On-Chip Trace Control for Embedded Processor Debugging
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Solution Overview
Problem
Current debugging tools for embedded processor systems lack the necessary control and flexibility to efficiently trace program counter and data, leading to increased development times and costs due to reduced visibility into hardware and software states, especially in embedded processors with limited I/O-pin count and die size constraints.
Innovation Solution
A tracing system with on-chip components including a microprocessor core, trace generation logic, trace control block, and test access port controller, which generates and manages program counter and data trace information, allowing for customizable trace data storage and retrieval through a trace interface and trace memory, enabling efficient debugging and trace reconstruction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If traditional debugging tools are used for embedded processor systems, then development costs and time are reduced, but visibility into processor states and control over tracing is insufficient
Solution Approach 1:
The tracing system is nested within the embedded processor itself, with trace generation logic and control registers integrated into the processor core. This allows the processor to trace its own execution states without requiring external complex debugging equipment, thereby improving visibility while managing complexity through self-contained design.
Solution Approach 2:
Trace control registers serve as intermediaries between software/debugging tools and the trace generation logic. These registers provide a controlled interface that enables software to configure and control tracing without directly accessing complex hardware tracing mechanisms, thus improving information visibility while abstracting away the complexity.
2Ease of manufacture
If I/O-port pin count is reduced to lower die size costs, then manufacturing cost is reduced, but bandwidth for trace data is reduced
Solution Approach 1:
The system changes the parameters of trace data transmission by using compact encoding schemes and selective tracing. Instead of transmitting all possible trace information, the system transmits only the most critical processor states and control information, thereby maintaining adequate bandwidth for debugging while reducing the number of I/O pins required.
Solution Approach 2:
The system extracts only the essential trace information needed for debugging purposes, rather than transmitting complete processor state data. By selecting and transmitting only critical trace data elements, the system reduces bandwidth requirements and I/O pin count while maintaining effective debugging capability.
3Adaptability or versatility
If software complexity increases, then application functionality is improved, but verification burden increases
Solution Approach 1:
The tracing system enables continuous monitoring of processor execution states throughout software verification. By continuously capturing trace data during normal processor operation, the system provides ongoing visibility into software execution without interrupting the verification process, thereby reducing total verification time while supporting complex application functionality.
Solution Approach 2:
The system provides feedback mechanisms through trace control registers that allow debugging tools to receive real-time information about processor states. This feedback enables automated verification processes to quickly identify and isolate issues in complex software, significantly reducing verification time compared to traditional manual debugging methods.
Data Source
AI summary
A system and method for program counter and data tracing is disclosed. The tracing mechanism of the present invention enables increased visibility into the hardware and software state of the processor core.