On-Chip Transformer Balun Multi-Layer Winding Current Capacity
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Solution Overview
Problem
Conventional on-chip transformer baluns face parasitic effects and limited current capacity due to winding methods, restricting impedance transformation and requiring more layout area, which leads to power loss in power transformation.
Innovation Solution
An on-chip transformer balun is designed with multiple isolating layers, featuring primary and secondary windings with semi-turn coils, metal bridges, and vias to increase current capacity and winding ratio, allowing for high-to-low impedance transformation in a single stage without expanding layout area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If winding is performed in different layers, then the coupling coefficient decreases due to parasitic effects, but the winding ratio can be increased
Solution Approach 1:
The patent transitions from planar winding to three-dimensional multi-layer winding, utilizing vertical stacking of metal layers to achieve both high coupling coefficient and high winding ratio simultaneously. The multi-layer structure allows windings to be positioned in different spatial dimensions while maintaining strong magnetic coupling through careful layer arrangement.
Solution Approach 2:
The patent implements nested winding structures where inner windings are positioned within the magnetic field region of outer windings. This nested arrangement maximizes the overlapping area of magnetic fields between primary and secondary windings, thereby enhancing the coupling coefficient while accommodating increased winding ratios through efficient space utilization.
2Reliability
If winding is performed in the same layer, then the coupling coefficient increases, but the winding ratio cannot be increased due to limited layout area
Solution Approach 1:
The patent resolves the layout area limitation by extending the winding structure into the vertical dimension with multiple metal layers. This allows the winding ratio to be increased without compromising the coupling coefficient, as the multi-layer configuration maintains strong magnetic coupling while providing sufficient space for high-ratio windings.
3Area of stationary object
If metal bridges are used to connect windings, then the current density is confined to the sustainable density of lower layers, but the layout area is reduced
Solution Approach 1:
The patent segments the current path into multiple parallel conductors distributed across different metal layers. Instead of relying on a single metal bridge, the current is divided and transmitted through multiple vias and conducting sections, allowing the overall current capacity to exceed the limitation of individual lower-layer conductors.
Solution Approach 2:
The patent creates a composite current transmission path combining multiple materials and layers (different metal layers, vias, and conducting sections) to achieve superior current-carrying capacity. This composite structure leverages the advantages of each layer to sustain higher current densities than any single layer could provide alone.
4Reliability
If more transformation stages are used to achieve high-to-low impedance transformation, then the impedance transformation ratio is improved, but the layout area increases and power loss increases
Solution Approach 1:
The patent achieves high impedance transformation ratios by optimizing the winding ratio and geometric parameters of the transformer structure itself, rather than cascading multiple transformation stages. By adjusting the number of turns, wire dimensions, and layer configuration, the desired impedance transformation is achieved in a single compact stage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables higher current handling and reduced power loss by increasing the winding ratio and sustaining higher currents than conventional transformers, while conserving layout space.
Implementation Method 1
The first vias couple the first conducting sections and the first wire sections. The second vias couple the at least one second conducting section and the second wire sections.
Implementation Method 2
An on-chip transformer balun includes a primary winding and a secondary winding... The third semi-turn coils are interlaced with the first semi-turn coils. The fourth semi-turn coils are interlaced with the second semi-turn coils.
Data Source
AI summary
The invention provides an on-chip transformer balun formed among N successive isolating layers. The transformer includes a primary winding and a secondary winding. The primary winding includes a plurality of first semi-turn coils, a plurality of second semi-turn coils, a plurality of metal junctions, and a plurality of first metal bridges. The secondary winding includes a plurality of third semi-turn coils, a plurality of fourth semi-turn coils, and a plurality of second metal bridges. The first semi-turn coils are connected with the second semi-turn coils by the metal junctions and the first metal bridges. The third semi-turn coils are connected with the fourth semi-turn coils by the second metal bridges. By use of the multi-layer first metal bridges, the transformer according to the invention allows a larger input current than a conventional on-chip transformer.