On-Chip Supply Voltage Measurement Using Timed ADC-PLL Sampling
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Solution Overview
Problem
On-chip measurement of supply voltages and signal lines is challenging due to the trade-off between sampling rate and measurement resolution, and existing solutions like complex ADCs are limited by fabrication constraints and die-area usage.
Innovation Solution
A system combining high-resolution ADCs with a voltage-controlled oscillator (VMON) to increase sampling rate by calibrating and combining measurements, using a timer to adjust the ADC start delay relative to the application code start, effectively enhancing measurement accuracy and bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complex ADCs are used to improve measurement resolution, then measurement precision is improved, but device complexity and die-area usage increase
Solution Approach 1:
The patent combines multiple low-resolution ADC measurements taken at different time delays with a voltage monitor to achieve high-resolution supply voltage measurement. Instead of using a single complex high-resolution ADC, the system merges multiple simple measurements to achieve the desired precision, thereby reducing device complexity and die-area usage while maintaining measurement accuracy.
2Productivity
If sampling rate is increased to improve bandwidth, then measurement bandwidth is improved, but measurement precision deteriorates due to the trade-off
Solution Approach 1:
The patent performs preliminary measurements at multiple time delays before combining them to achieve the final high-resolution result. By预先 capturing multiple low-resolution samples at different timing points and then combining them through processing with the voltage monitor, the system achieves both high sampling rate/bandwidth and high measurement precision, resolving the traditional trade-off between these parameters.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for improved resolution and bandwidth in supply voltage and signal noise measurements, enabling more accurate analysis and corrective actions within on-chip environments without the limitations of complex ADCs.
Implementation Method 1
a voltage-controlled oscillator (VMON) to increase sampling rate
Data Source
AI summary
A arrangement is disclosed for an on-chip system having an increased resolution for supply voltage measurements. The system includes a phase locked loop (PLL), a divider, and a timer. The PLL is configured to generate an oscillator signal. The divider is configured to divide the oscillator signal to generate an divided clock signal. The timer is configured to generate an application start signal and an analog to digital converter (ADC) start signal based on the oscillator signal and a timer delay (Tdelay). The timer delay (Tdelay) is based on the application start signal and the ADC start signal.