On-Chip Oscilloscope Using Time-to-Current Waveform Reconstruction
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Solution Overview
Problem
Integrated circuits (ICs) face challenges in testing electrical elements post-manufacture, necessitating the development of on-chip oscilloscopes for wafer acceptance testing (WAT) to monitor internal signals, particularly voltage signals, which require efficient reconstruction of waveforms to assess amplitude and time intervals.
Innovation Solution
The implementation of a device comprising a control circuit, scope circuit, and time-to-current converter, which generates current signals corresponding to voltage signal amplitudes and time intervals, allowing for the reconstruction of the voltage signal through a combination of delay units, NAND gates, transmission gates, and resistors, enabling on-chip monitoring without external oscilloscopes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external oscilloscopes are used to monitor internal signals, then measurement precision is improved, but device complexity and testing efficiency deteriorate due to the need for external equipment and complex signal routing
Solution Approach 1:
The patent combines the oscilloscope functionality with the IC chip by integrating a scope circuit, control circuit, and time-to-current converter directly on-chip. This merging eliminates the need for external oscilloscopes and complex signal routing, thereby reducing device complexity while maintaining measurement precision through direct internal signal monitoring.
Solution Approach 2:
The patent introduces intermediate conversion circuits that transform voltage signals into current signals for processing. The time-to-current converter and scope circuit act as intermediaries that enable precise voltage signal measurement through current-based processing, which is then converted back for reconstruction, maintaining measurement precision while enabling on-chip integration.
2Productivity
If on-chip monitoring circuits are integrated, then device complexity is reduced and productivity is improved, but measurement precision deteriorates due to signal distortion from loading effects
Solution Approach 1:
The patent changes the signal parameter from voltage to current during processing. By converting voltage signals to current signals in the time-to-current converter and processing them as current, the circuit achieves low loading effects that prevent signal distortion. The current signals are then converted back to voltage for waveform reconstruction, maintaining measurement precision while enabling efficient on-chip integration.
Solution Approach 2:
The patent creates accurate current signal copies of the original voltage signals through the scope circuit and time-to-current converter. These current signal copies are processed and reconstructed to reproduce the original voltage waveform, enabling precise measurement without directly loading the original signal path, thus maintaining measurement precision while improving productivity.
3Ease of operation
If signal loading is increased to improve signal detection, then ease of operation is improved, but signal distortion increases causing measurement precision to deteriorate
Solution Approach 1:
The patent changes the signal parameter from voltage to current to achieve low loading effects. Current-based processing in the time-to-current converter and scope circuit provides sufficient signal detection capability without causing voltage signal distortion, thereby maintaining both ease of operation and measurement precision simultaneously.
Data Source
AI summary
A device includes a control circuit, a scope circuit, a first logic gate and a second logic gate. The control circuit is configured to generate a first control signal according to a voltage signal and a delayed signal. The scope circuit is configured to generate a first current signal in response to the first control signal and the voltage signal. The first logic gate is configured to perform a first logical operation on the voltage signal and one of the voltage signal and the delayed signal to generate a second control signal. The second logical gate configured to perform a second logical operation on the second control signal and a test control signal to generate a second current signal.