On-Die Control Bus Termination With Independent Memory Settings
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Solution Overview
Problem
Current memory modules face challenges in implementing on-die termination (ODT) for control signal buses due to the need for complex command execution and shared resistance settings across all memory devices, leading to increased overhead and initialization time, and limited flexibility in programming different memory devices.
Innovation Solution
A memory device with a mechanism that uses load or reset signals to set termination resistance levels for a control bus, allowing each memory device on a module to have independent ODT states and resistance settings, enabling flexible management of control signal bus states and resistance levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external terminators are located on the memory module, then control signal termination is achieved, but space on the memory module is consumed and cost increases
Solution Approach 1:
The termination function is extracted from external components and integrated directly into the memory device die, eliminating the need for separate external terminators on the memory module while maintaining effective control signal termination
Solution Approach 2:
The termination resistance is merged with the memory device structure itself, combining the memory storage function and signal termination function into a single integrated component on the die
2Adaptability or versatility
If ODT is implemented for control signal bus, then termination resistance can be programmed, but additional overhead and longer initialization time are required
Solution Approach 1:
The termination resistance settings are predetermined and stored in non-volatile memory within the memory device, allowing the ODT to be quickly activated without requiring time-consuming programming operations during initialization
Solution Approach 2:
The memory device automatically configures its own termination resistance settings using internally stored configuration data, eliminating the need for external programming operations and reducing initialization overhead
3Device complexity
If control signal bus is common to all memory devices, then routing is simplified, but different memory devices cannot be programmed with different ODT settings
Solution Approach 1:
Each memory device is equipped with its own independently controllable ODT circuit and configuration memory, allowing each device to have customized termination settings while sharing the common control signal bus infrastructure
Solution Approach 2:
The termination control is segmented into individual device-level units, with each memory device having separate ODT control logic and configuration storage, enabling independent programming while maintaining a unified bus structure
Data Source
AI summary
A system for providing on-die termination (ODT) of a control signal bus. The system includes a memory device that includes a plurality of data bus connectors, one or both of a load signal connector and a reset signal connector, a control bus connector, an ODT, and a mechanism. The ODT is in communication with the control bus connector, and the ODT provides a level of termination resistance to a control bus connected to the control bus connector. The mechanism latches data received via the data bus connectors in response to a signal received via one or both of the load signal connector and the reset signal connector. The data is utilized to set the level of termination resistance provided by the ODT.