On-Die ECC for Meta Data Storage Without Register Latency
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Solution Overview
Problem
Memory systems experience latency and vulnerability to errors when storing meta data in registers, leading to potential invalid data transmission and increased latency.
Innovation Solution
Concurrently store data and meta data in memory arrays using error correction encoding, allocating separate portions for meta data and data, and employing error correction codewords for detection and correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If meta data is stored in registers, then data can be quickly accessed, but latency increases and errors occur during transmission
Solution Approach 1:
The patent extracts the meta data storage function from the register (temporary storage) and relocates it to the memory array (permanent storage). This eliminates the vulnerability of storing meta data in registers while maintaining direct access capability, thereby resolving the contradiction between reliability and latency.
Solution Approach 2:
The patent merges the storage of meta data and data into the same memory array structure, allowing both to be accessed simultaneously through the same memory interface. This integration eliminates the need for separate register storage and reduces the complexity of data transmission paths, reducing latency while maintaining integrity through error correction codes.
2Ease of operation
If meta data is stored in registers, then access is simplified, but vulnerability to errors increases
Solution Approach 1:
The patent removes the error vulnerability inherent in register-based meta data storage by extracting this function and implementing it in the memory array with built-in error correction capabilities. The memory array provides both the simplicity of direct access and the reliability of error detection and correction.
Solution Approach 2:
The patent applies error correction codes (parity bits, Hamming codes, or Reed-Solomon codes) to the meta data before storing it in the memory array. This beforehand cushioning protects against errors during storage and retrieval operations, maintaining both ease of access and reliability without requiring complex error handling procedures.
3Adaptability or versatility
If separate storage portions are used for meta data and data, then organization is improved, but device complexity increases
Solution Approach 1:
The patent segments the memory array into distinct portions for storing meta data and data, allowing for organized and efficient memory management. This segmentation is achieved through address space division or physical partitioning within the memory array, enabling the system to maintain adaptability while managing complexity through structured organization rather than separate physical components.
Data Source
AI summary
Methods, systems, and devices for on-die error detection and correction for meta data are described. A memory system may receive a write command associated with a first set of bits that includes data bits and meta data bits associated with the data bits and generate a second set of bits based on inputting the first set of bits into an error correction encoder. The second set of bits may include the data bits, the meta data bits, and parity bits. Upon generating the second set of bits, the memory system may store the meta data bits in at least a portion of a first memory space of the memory array of the memory system. The memory array may include the first memory space allocated for meta data and a second memory space allocated for data.