On-Die Termination Control for Multi-Rank Memory Power Savings
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Solution Overview
Problem
On-die termination (ODT) in semiconductor integrated circuits enhances signal integrity but increases power consumption, necessitating a method to reduce power consumption while maintaining signal integrity.
Innovation Solution
Implementing a method where ODT circuits are enabled in an initial state during power-on, enabled during write operations for all memory ranks, and disabled only during read operations for the target memory rank, while remaining enabled for non-target ranks, allowing for static ODT control and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ODT circuits are enabled to enhance signal integrity, then signal reflection is reduced, but power consumption is increased
Solution Approach 1:
The patent applies dynamics by making the ODT circuit state changeable between enabled and disabled modes based on operational conditions. The ODT circuit is dynamically controlled to be enabled during write operations and disabled during read operations, allowing the system to adapt its termination state to match the current operational requirements, thus resolving the contradiction between maintaining signal integrity and reducing power consumption
Solution Approach 2:
The patent changes the operational parameter of the ODT circuit from a static enabled state to a dynamic state that switches between enabled and disabled based on the operation type (write or read). This parameter change allows the system to optimize signal integrity when needed (write operations) and reduce power consumption when possible (read operations), effectively resolving the technical contradiction
2Reliability
If ODT circuits are enabled during read operations for target memory rank, then signal reflection is reduced, but standby power consumption is increased
Solution Approach 1:
The patent extracts the ODT circuit from the always-enabled state and selectively removes it during read operations for the target memory rank. By taking out the ODT function when it is not critically needed (during reads), the system achieves significant standby power reduction while maintaining signal integrity during write operations where the ODT circuit remains enabled
Solution Approach 2:
The patent applies partial action by enabling the ODT circuit only for specific operations (write operations and non-target rank reads) rather than continuously for all operations. This partial enabling strategy provides sufficient signal integrity for critical operations while avoiding the excessive power consumption that would result from continuous enabling, thus resolving the contradiction between signal integrity and standby power consumption
Data Source
AI summary
A method of controlling on-die termination (ODT) in a multi-rank system including a plurality of memory ranks is provided. The method includes: enabling ODT circuits of the plurality of memory ranks into an initial state when the multi-rank system is powered on; enabling the ODT circuits of a write target memory rank and non-target memory ranks among the plurality of memory ranks during a write operation; and disabling the ODT circuit of a read target memory rank among the plurality of memory ranks while enabling the ODT circuits of non-target memory ranks among the plurality of memory ranks during a read operation.