On-Die Termination Timing for Faster Memory Signal Reception
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Solution Overview
Problem
Existing signal transmitting and receiving apparatuses and memory devices face performance degradation due to the simultaneous enabling and disabling of on-die termination circuits, which causes preamble and postamble times that hinder efficient signal transmission and reception.
Innovation Solution
The implementation of independently controlled on-die termination circuits for each pin, allowing for differential enable and disable timing to prevent performance degradation by enabling the first on-die termination circuit before the second, allowing signal transmission or reception with reduced waiting for the second circuit to be enabled.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If on-die termination circuits are enabled simultaneously for all pins, then signal integrity is improved, but preamble and postamble times increase causing performance degradation
Solution Approach 1:
The on-die termination circuits are segmented into multiple independent units (first ODT circuit for data pin, second ODT circuit for read data strobe pin) that can be controlled separately. This segmentation allows selective enabling of individual ODT circuits based on specific signal transmission needs, rather than enabling all ODT circuits simultaneously, thus reducing unnecessary preamble and postamble times while maintaining signal integrity for active signals.
Solution Approach 2:
The patent implements dynamic control of ODT circuit enabling timing, where the first ODT circuit can be enabled at a different time than the second ODT circuit. The control circuit adjusts the enabling timing of each ODT circuit dynamically based on the signal transmission requirements, allowing the system to optimize performance by enabling ODT circuits only when needed for each specific pin, thereby reducing overall preamble and postamble times.
2Reliability
If on-die termination circuits are enabled earlier to improve signal integrity, then signal quality improves, but transmission efficiency decreases due to increased waiting time
Solution Approach 1:
The first ODT circuit is enabled in advance before the second ODT circuit, preparing the data pin for signal reception earlier. This preliminary action ensures that when data signals arrive at the data pin, the termination circuit is already in place to maintain signal quality, while the read data strobe pin's ODT circuit is enabled only when needed, thus balancing signal quality requirements with transmission efficiency.
Solution Approach 2:
Different enabling timings are applied to different ODT circuits based on their specific functional requirements. The data pin's ODT circuit is enabled earlier to ensure signal quality for data reception, while the read data strobe pin's ODT circuit is enabled later to avoid unnecessary waiting time. This localized quality control approach optimizes each pin's signal integrity independently without compromising overall transmission efficiency.
Data Source
AI summary
A signal transmitting and receiving apparatus including: a first on-die termination circuit connected to a first pin through which a first signal is transmitted or received and, when enabled, the first on-die termination circuit is configured to provide a first termination resistance to a signal line connected to the first pin; a second on-die termination circuit connected to a second pin through which a second signal is transmitted or received and, when enabled, the second on-die termination circuit is configured to provide a second termination resistance to a signal line connected to the second pin; and an on-die termination control circuit configured to independently control an enable time and a disable time of each of the first on-die termination circuit and the second on-die termination circuit.