On-Package I/O Interfaces for High-Bandwidth Low-Power Chip Interconnects

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Solution Overview

Problem

Conventional high-bandwidth interconnections between chips require significant power and chip area, making them undesirable for applications needing reduced power consumption and smaller chip size.

Innovation Solution

The implementation of on-package input/output (I/O) interfaces with impedance-matched CMOS transmitters and receivers, minimal electrostatic discharge protection, and length-matched routing to achieve high bandwidth at low power and area, using forwarded clock signals and phase-locked loops for synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional I/O interfaces are used for high-bandwidth interconnections, then bandwidth is improved, but power consumption and chip area increase significantly

Engineering Contradiction:

ImprovebandwidthVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent replaces conventional mechanical/electrical I/O interfaces with a photonic communication system using light to transmit data between chips. This substitution enables high-bandwidth communication while dramatically reducing power consumption, as photonic systems consume less energy than electrical I/O interfaces for the same data rate.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If conventional I/O interfaces are used for high-bandwidth interconnections, then bandwidth is improved, but chip area increases significantly

Engineering Contradiction:

ImprovebandwidthVSAvoidchip area

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

The patent replaces conventional electrical I/O interfaces with photonic transmitters and receivers integrated directly on the chip. This substitution reduces chip area by eliminating the need for large electrical connection structures and associated support circuitry, while providing high-bandwidth communication capabilities.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If minimal electrostatic discharge protection is used, then device complexity is reduced, but reliability may be affected

Engineering Contradiction:

Improvedevice complexityVSAvoidreliability

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent applies minimal electrostatic discharge protection rather than comprehensive protection schemes. This partial approach reduces device complexity and overhead while providing sufficient protection for the photonic interface, balancing reliability requirements with system simplicity.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS9274544B2Sideband initialization

Publication Date: 2016.03.01 INTEL CORP

AI summary

Initialization in multiple clock domains. A first die having a master initialization component generates initialization commands. A local initialization agent on the first die is coupled to receive the initialization commands. The local initialization agent manages initialization of one or more components on the first die. A remote initialization agent on a second die is coupled to receive the initialization commands. The remote initialization agent manages initialization of one or more components on the second die. The master initialization component receives acknowledgement messages from the local initialization agent and the remote initialization agent to manage conflicts and dependencies between the local initialization agent and the remote initialization agent and synchronizes events in multiple clock domains that share a reference clock signal by signaling in the reference clock domain.