On-Pixel Digital Compression for Photon Flux Encoding
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Solution Overview
Problem
Current imaging detectors face challenges in achieving high frame rates due to bottlenecks in data transfer from pixel arrays to transceiver circuits, with quantization noise becoming significant when it approaches the magnitude of other noise sources, particularly in applications with non-uniform photon arrival statistics modeled by a Poisson process.
Innovation Solution
The implementation of on-pixel digitization using analog-to-digital converters (ADCs) with uniform quantization steps and digital compression circuits (DCCs) that remap ADC outputs to adjust quantization error based on signal strength, allowing for efficient encoding and transmission of photon flux data, thereby reducing noise and increasing frame rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If uniform quantization steps are used in ADC, then circuit complexity is reduced, but quantization noise becomes significant when it approaches the magnitude of Poisson noise
Solution Approach 1:
The patent changes the quantization step parameter from uniform to variable based on signal amplitude. The quantization step size is adjusted dynamically according to the detected signal strength, allowing larger steps for high signals and smaller steps for low signals, thereby optimizing the balance between circuit complexity and measurement precision
Solution Approach 2:
The patent introduces dynamic adaptation in the quantization process by making the quantization step size dependent on the signal amplitude. This dynamic adjustment allows the system to optimize quantization performance for varying signal conditions without requiring complex circuitry, resolving the contradiction between simplicity and precision
2Measurement precision
If full-resolution digital data is transmitted from all pixels, then measurement precision is maintained, but data transfer bottleneck limits frame rate
Solution Approach 1:
The patent extracts only the most significant bits of the digital signal for transmission, removing less significant bits that contribute minimally to signal quality. This extraction approach reduces data volume for transmission while maintaining essential signal information, thereby increasing frame rate without significantly compromising measurement precision
Solution Approach 2:
The patent applies different quality levels to different parts of the signal by transmitting full-resolution data for low-amplitude signals (where precision is critical) and reduced-resolution data for high-amplitude signals (where relative precision matters less). This local quality adjustment optimizes both frame rate and signal quality
3Measurement precision
If more bits are used for digital representation, then measurement precision is improved, but circuit real estate and power consumption increase
Solution Approach 1:
The patent applies partial action by using only the necessary number of bits for digital representation based on signal amplitude. Instead of always using maximum bits, the system uses fewer bits when sufficient, reducing circuit real estate and power consumption while maintaining adequate measurement precision through selective bit usage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables faster frame rates while maintaining high signal quality by aligning quantization noise with amplitude-dependent noise, reducing circuit real estate, and power consumption, and efficiently managing data transfer through efficient pixel aggregation and compression.
Implementation Method 1
each sensor is configured to generate an analog electrical signal indicative of a number of photons detected by the sensor
Data Source
AI summary
A detector for imaging and efficiently digitizing a spatial distribution of photon flux includes pixel circuits that compressively encode pixel values generated by integrated analog to digital converters (ADCs). On-pixel digital compression circuits (DCCs) implement compression to increase continuous frame rate by reducing the number of bits per pixel while keeping quantization error below Poisson noise. Several mapping algorithms for photon-counting and charge-integrating detectors and compact digital logic implementations are presented.