On-Chip LDO Header Switch Regulation for PMIC Routing Reduction
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Solution Overview
Problem
The increasing complexity of application processors in mobile devices leads to a higher number of power supply voltages and internal circuits in PMICs, resulting in a greater number of off-chip load capacitors and inductors, which hinders power management through dynamic voltage scaling and increases production costs due to the inclusion of LDO regulators in system-on-chip (SoC) processes.
Innovation Solution
A system-on-chip with a low-dropout (LDO) regulator that reduces the number of power routings between the core and PMIC and off-chip devices by using a header switch circuit and logic circuit to regulate current and control the on/off states of header switches based on supply voltage changes, thereby stabilizing the supply voltage and reducing production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of power supply voltages and internal circuits in PMIC is increased to support improved mobile device performance, then the power management capability is enhanced, but the number of off-chip load capacitors and inductors increases and production cost increases
Solution Approach 1:
The patent merges the LDO regulator functionality into the system-on-chip (SoC) structure, integrating it with the power management integrated circuit (PMIC). This consolidation eliminates the need for separate off-chip LDO regulators and reduces the number of external power routing components, directly addressing the technical contradiction by maintaining enhanced power management capability while reducing off-chip component count and production cost
2Reliability
If an LDO regulator is included in an expensive SoC process to minimize damage caused by merging of power domains, then power domain merging is protected, but production cost increases
Solution Approach 1:
The LDO regulator is integrated into the SoC manufacturing process rather than being implemented as a separate external component. This integration allows the LDO functionality to be embedded within the existing SoC fabrication flow, reducing the need for additional expensive external components while maintaining the protective function for power domain merging
Solution Approach 2:
The SoC structure provides its own LDO regulator functionality through integrated circuits within the chip, eliminating the need for external LDO regulators. The header switch circuit and logic circuit work together to provide voltage regulation and protection functions that were previously requiring separate external components, thereby reducing production cost while maintaining reliability
3Ease of manufacture
If the number of power routings between core and PMIC and off-chip devices is reduced by integrating LDO regulator in SoC, then production cost decreases, but power management complexity increases
Solution Approach 1:
The power management function is segmented into distinct modular components: the LDO regulator module, the header switch circuit with multiple header switches, and the logic circuit. This segmentation allows each component to perform its specific function efficiently while maintaining overall system manageability. The modular structure enables independent optimization of each component without increasing overall system complexity
4Productivity
If header switches are controlled based on supply voltage changes to regulate current, then power management efficiency is improved, but control circuit complexity increases
Solution Approach 1:
The logic circuit receives information about supply voltage changes and uses this feedback to control the on/off states of the header switches. This feedback mechanism enables the system to dynamically adjust current distribution in response to voltage variations, improving power management efficiency while keeping the control logic relatively simple through rule-based decision making
Data Source
AI summary
A system-on-chip according to an embodiment includes a core including a header switch circuit configured to transmit a power supply voltage applied to a first power rail as a supply voltage to a second power rail and a logic circuit configured to operate based on the supply voltage from the second power rail, and a low-dropout (LDO) regulator configured to regulate a magnitude of first current output to the second power rail based on a change in the supply voltage, wherein the LDO regulator is further configured to control on/off of a plurality of first header switches included in the header switch circuit based on an amount of the change in the supply voltage.