Configurable On-Chip Magnetic Antenna Array for IC Attack Detection
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Solution Overview
Problem
Current technologies face challenges in detecting and defending against magnetic-field based side-channel attacks, fault injections, and hardware Trojans in integrated circuits, due to limitations in measurement resolution and sensitivity of external magnetic probes.
Innovation Solution
An on-chip multi-mode configurable magnetic antenna array is integrated into microprocessors or digital ICs, comprising a wire grid with horizontal and vertical wires, programmable switches, and antenna loops. This array can operate in detection, shielding, and cancelation modes to detect, identify, and defend against malicious attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If external magnetic probes are used to detect magnetic fields, then the detection coverage is large, but the measurement resolution and sensitivity are limited
Solution Approach 1:
The patent divides the magnetic detection function into multiple on-chip antenna elements arranged in an array. Each antenna element is small in size (providing high sensitivity and resolution) but collectively they cover a large area through the array configuration. This segmentation allows the system to maintain high measurement precision while achieving large detection coverage.
Solution Approach 2:
The patent embeds the magnetic antenna array directly within the integrated circuit chip, nesting the detection system inside the object being monitored. This allows the antennas to be positioned extremely close to the magnetic field sources (current paths), dramatically improving sensitivity and resolution while the array configuration provides extensive coverage of the chip interior.
2Measurement precision
If on-chip sensors are used to improve measurement resolution and sensitivity, then the detection accuracy increases, but the sensing area and coverage are reduced
Solution Approach 1:
The patent uses multiple small antenna elements segmented across the chip. Each element provides high local sensitivity due to its small size and close proximity to magnetic sources, while the collective array of these segmented elements achieves comprehensive coverage of the entire chip area.
Solution Approach 2:
The patent utilizes three-dimensional integration by placing antenna elements on multiple metal layers within the chip. This vertical dimensionality allows the system to achieve both high local sensitivity (through close spacing in the Z-direction) and extensive planar coverage (through distribution across X-Y plane), effectively resolving the contradiction between accuracy and coverage.
3Measurement precision
If multiple smaller coils are used to improve resolution, then the signal magnitudes decrease and coverage is reduced
Solution Approach 1:
The patent combines multiple small antenna elements into a unified array system with centralized signal processing. The individual coil outputs are summed or processed collectively, allowing the system to achieve the resolution benefits of small coils while recovering signal magnitude through coherent combination of all element outputs.
Solution Approach 2:
The patent designs the antenna array with programmable switching that allows different groups of antennas to be activated based on the detection requirements. This multi-functionality enables the system to use only the necessary number of antennas for a given measurement, optimizing the balance between resolution (using fewer, smaller antennas) and signal magnitude (using more antennas when needed).
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The on-chip magnetic antenna array enhances the detection and defense capabilities against side-channel attacks, fault injections, and hardware Trojans by providing higher resolution and sensitivity, accurately locating magnetic leakage regions, and effectively canceling or masking malicious magnetic fields.
Implementation Method 1
The induced voltage V(t) at the probe may represent the change rate of the leakage magnetic flux according to the following equation: where A may represent a probe loop area vector.
Implementation Method 2
A near magnetic flux density B is proportional to the product of the current magnitude I and the current loop area A
Data Source
AI summary
An integrated circuit providing hardware security. The integrated circuit comprising a wire grid, wherein the wire grid comprises: (i) a wire grid spanning two metal layers comprising horizontal wires and vertical wires, (ii) a switch at each intersection of the horizontal wires and the vertical wires, wherein each switch comprises a transmission gate, (iii) one or more loop areas, wherein, for each intersection, the transmission gate is programmable to control connectivity at the intersection forming the one or more loop areas, and (iv) one or more amplifiers configured with the loop areas to provide one or more functions including (a) detecting trojans, (b) defending against fault injections by partially canceling injected magnetic fields with induced currents, (c) cancel fault injections by canceling injected magnetic fields, or (d) masking side-channel leakage by generate noising magnetic fields.