On-Chip Noise Detection Circuit for WAT Frequency Limits
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Solution Overview
Problem
Integrated circuit (IC) testing in platforms like Wafer Acceptance Test (WAT) is challenging due to equipment limitations, such as a restricted clock signal frequency of 10 MHz and the requirement for specific devices like a GSG probe card, which complicates the detection of noise levels.
Innovation Solution
A noise detecting system comprising an amplifier circuit, a filtering circuit, and a comparing circuit, integrated into an IC and formed on a semiconductor substrate, which amplifies, filters, and compares signals to determine noise levels, using a clock generator and analyze device to derive noise levels without exceeding the 10 MHz frequency constraint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional external testing equipment is used for IC noise detection, then measurement capability is available, but equipment limitations (10 MHz frequency constraint, specific device requirements) prevent effective noise level detection
Solution Approach 1:
The IC device performs noise level detection autonomously using internally integrated functional circuits (amplifier, filter, comparator) rather than relying on external testing equipment. The device tests itself by generating test signals through its own clock generator and processing them through its own signal processing circuits, eliminating dependence on external equipment with frequency constraints and specific device requirements.
Solution Approach 2:
The noise detection function is merged with the IC device itself by integrating the detection circuits directly into the device. The amplifier circuit, filtering circuit, comparing circuit, and clock generator are all incorporated within the IC device, combining the tested object and the testing instrument into a single unified system that overcomes equipment limitations.
2Adaptability or versatility
If clock signal frequency is limited to 10 MHz due to equipment constraints, then equipment compatibility is maintained, but noise level detection precision deteriorates
Solution Approach 1:
The system dynamically adapts to different frequency requirements by generating test clock signals at various frequencies (including frequencies above 10 MHz) using an on-chip clock generator. The frequency can be adjusted based on the specific testing needs, allowing the system to operate beyond the 10 MHz limitation of external equipment while maintaining equipment compatibility through flexible frequency selection.
3Measurement precision
If specific devices like GSG probe card are required for testing, then measurement capability is provided, but device complexity and operation difficulty increase
Solution Approach 1:
The IC device performs self-testing for noise level detection using internally integrated functional circuits, eliminating the need for specialized external testing equipment like GSG probe cards. This self-service approach simplifies the testing operation by removing complex equipment setup and connection requirements, making the testing process more accessible and easier to perform.
4Measurement precision
If noise detection is performed externally, then measurement is possible, but testing time and operational complexity increase
Solution Approach 1:
The noise detection function is merged into the IC device itself through integration of amplifier, filter, comparator, and clock generator circuits. This integration eliminates the need for separate external testing equipment and associated setup time, allowing noise level measurements to be performed quickly and efficiently as part of the device's own operational testing sequence.
Data Source
AI summary
A noise detecting circuit including an amplifier circuit, a filtering circuit and a comparing circuit. The amplifier circuit is arranged to amplify an input signal and output an amplified signal, wherein the input signal is received from a circuit to be detected and indicates a noise level of the circuit to be detected. The filtering circuit is coupled to the amplifier circuit and arranged to filter the amplified signal and output a filtered signal. The comparing circuit is coupled to the filtering circuit and arranged to compare the filtered signal to a reference voltage and output an output signal indicating the noise level of the circuit to be detected.