On-Die Controller Interface for Non-Volatile Memory

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Solution Overview

Problem

Existing non-volatile memory technologies face compatibility issues due to differences in speed and latency, as previous interfaces and protocols are not suited for the higher speeds of new non-volatile memory technologies, and volatile memory interfaces are not compatible with non-volatile memory characteristics.

Innovation Solution

The implementation of an apparatus and system with an on-die controller that uses multiple ports for command and data operations, allowing for both a high-speed mode and a legacy compatibility mode, with the on-die controller queuing commands and shifting them based on clock pulses to ensure efficient data transfer and compatibility with various memory types.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If previous non-volatile memory interfaces and protocols are used, then compatibility with legacy systems is maintained, but data transfer speed is limited and cannot meet the requirements of higher speed non-volatile memory technologies

Engineering Contradiction:
Improvedata transfer speedVSAvoidinterface compatibility
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The interface is designed to dynamically switch between different operational modes (first mode using both first and second ports for high-speed operation, and second mode using only the first port for legacy compatibility). This dynamic adaptability allows the same interface to optimize for speed when needed while maintaining compatibility with older systems, resolving the contradiction between speed improvement and adaptability preservation.

Inventive Principle:
Principle #15Dynamics

2Speed

If volatile memory interfaces and protocols are used for high speed data transfers, then data transfer speed is improved, but compatibility with non-volatile memory characteristics such as latency and persistence is lost

Engineering Contradiction:
Improvedata transfer speedVSAvoidmemory characteristic compatibility
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The interface is segmented into multiple ports with distinct functions: the first port handles command and address information, while the second port handles data transfer. This segmentation allows the interface to process commands and transfer data through optimized paths, achieving high-speed performance while maintaining proper handling of non-volatile memory characteristics through the coordinated operation of separated functional blocks.

Inventive Principle:
Principle #1Segmentation

3Productivity

If an on-die controller with multiple ports and command queuing is implemented, then data transfer efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoidcontroller structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The on-die controller implements a command queue that pre-queues multiple commands before execution. This preliminary action allows the controller to prepare and organize commands in advance, enabling more efficient data transfer operations without requiring complex real-time decision-making logic, thus improving productivity while keeping the controller structure manageable.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10528255B2Interface for non-volatile memory
Publication Date: 2020.01.07 SANDISK TECHNOLOGIES LLC
  • US10528255B2 patent drawing
  • US10528255B2 patent drawing
  • US10528255B2 patent drawing

AI summary

Apparatuses, systems, methods, and computer program products are disclosed for accessing non-volatile memory. An apparatus includes one or more memory die. A memory die includes an array of non-volatile memory cells, a set of ports, and an on-die controller. The set of ports includes a first port and a second port. The first port includes a first plurality of electrical contacts and the second port includes a second plurality of electrical contacts. The on-die controller communicates via the set of ports to receive command and address information and to transfer data for a data operation on the array of non-volatile memory cells. The on-die controller uses the first port and the second port in a first mode and uses the first port without the second port in a second mode. The second mode provides compatibility with an interface of a legacy type of memory die.