On-Die FeRAM Array for Microprocessor Code Storage
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Solution Overview
Problem
Conventional systems storing operating code for on-die microprocessors in read-only memory (ROM) lack the ability to modify the code during runtime and cannot store data generated by the microprocessor, leading to space inefficiency and limited flexibility.
Innovation Solution
Incorporating a non-volatile ferroelectric random access memory (FeRAM) array on the same semiconductor die as the microprocessor, allowing for both read and write operations, which enables storage of operating code and user data, and implementing wear leveling to extend memory cell lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read-only memory (ROM) is used to store operating code for on-die microprocessors, then the code is reliably stored, but the system lacks the ability to modify the code during runtime and cannot store generated data
Solution Approach 1:
The patent merges the operating code storage with the FeRAM array by utilizing unused rows (skip rows) of the FeRAM array. This combination allows the system to maintain reliable code storage while gaining the flexibility of a writable memory medium, eliminating the need for separate ROM and FeRAM structures.
Solution Approach 2:
The FeRAM array is designed to serve multiple functions: storing user data, storing operating code for the on-die microprocessor, and supporting wear leveling operations. This multi-functionality resolves the contradiction by allowing a single memory structure to provide both reliable storage and runtime modifiability.
2Reliability
If dedicated ROM is used to store operating code, then code storage is ensured, but die space is wasted and flexibility is reduced
Solution Approach 1:
The patent combines operating code storage with the FeRAM array structure, eliminating the need for separate dedicated ROM. The unused rows of the FeRAM array are utilized for code storage, thereby conserving die space while maintaining code storage reliability.
Solution Approach 2:
The FeRAM array serves dual purposes: storing user data and storing operating code. This universal usage of the memory array eliminates wasted die space that would otherwise be required for dedicated ROM, while still ensuring reliable operating code storage.
3Duration of action of stationary object
If FeRAM array rows are used for wear leveling, then memory cell lifespan is extended, but available space for code storage is reduced
Solution Approach 1:
The patent extracts the operating code storage function from the main user data storage area by utilizing unused rows (skip rows) of the FeRAM array. This extraction allows wear leveling to operate on the data storage portion while code storage is maintained in the extracted unused portion, resolving the space conflict.
Solution Approach 2:
Different portions of the FeRAM array are assigned different functions: unused rows are dedicated to operating code storage while other rows are used for user data and wear leveling. This local differentiation of quality allows both wear leveling and code storage to coexist without competing for the same space.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution conserves die space, enhances flexibility by allowing data storage and management, and extends the lifespan of memory cells through efficient wear leveling, eliminating the need for dedicated ROM and enabling runtime modifications.
Implementation Method 1
Each memory cell may include a capacitor and a switching component. The capacitor may include a ferroelectric capacitor.
Data Source
AI summary
Methods, systems, and devices for operational code storage for an on-die microprocessor are described. A microprocessor may be formed on-die with a memory array. Operating code for the microprocessor may be stored in the memory array, possibly along with other data (e.g., tracking or statistical data) used or generated by the on-die microprocessor. A wear leveling algorithm may result in some number of rows within the memory array not being used to store user data at any given time, and these rows may be used to store the operating code and possibly other data for the on-die microprocessor. The on-die microprocessor may boot and run based on the operating code stored in memory array.