On-Die Memory Sequencer Post-Fabrication Adaptation
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Solution Overview
Problem
Conventional on-die sequencers in non-volatile memory systems have fixed control signal configurations and timings that cannot be modified after design and fabrication, making it costly and time-consuming to adapt to different usage conditions, error rates, or performance evaluations.
Innovation Solution
A system where a sequencer, embodied within the memory die, uses volatile memory to store configuration data that allows the adaptation of memory operation pulse timing and duration, enabling modifications to control signals after fabrication through stored sequencer entries with timer and signal fields, allowing dynamic adjustment of memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional on-die control circuitry is used with fixed logic circuitry, then the device size and power footprint are reduced, but the ability to modify control signal configuration, timing, and duration after fabrication is lost
Solution Approach 1:
The patent implements a dynamic sequencer that can modify control signal parameters (configuration, timing, duration) after fabrication by using a state machine that reads control words from a configuration register. This allows the fixed logic circuitry to dynamically adapt its behavior without physical redesign, resolving the contradiction between adaptability and device complexity.
Solution Approach 2:
The patent changes the parameters of control signals (timing, duration, configuration) by introducing a configuration register that stores control words. These control words are loaded into the sequencer to modify the behavior of the logic circuitry, enabling post-fabrication adaptation without increasing the physical device complexity.
2Adaptability or versatility
If conventional hard-wired sequencer logic is used, then manufacturing cost is reduced, but any changes require expensive re-design and re-fabrication
Solution Approach 1:
The patent applies preliminary action by pre-configuring control words in a configuration register that can be programmatically modified. This allows the sequencer logic to be manufactured once in a fixed state, while adaptability is achieved through software-like configuration changes, avoiding expensive re-fabrication and reducing manufacturing costs.
Solution Approach 2:
The patent uses a configuration register that stores control words as a copy of the desired sequencer behavior. Instead of modifying the physical logic circuitry, the system copies new control parameters into the register, which then drives the sequencer. This eliminates the need for expensive re-design and re-fabrication while enabling post-fabrication modifications.
3Adaptability or versatility
If fixed timing control is used, then device simplicity is maintained, but adaptation to different usage conditions, wear levels, and performance requirements is impossible
Solution Approach 1:
The patent implements a universal sequencer control mechanism that can adapt to different usage conditions, wear levels, and performance requirements through a single configuration register. The state machine reads control words that determine timing and duration parameters, allowing one circuit to serve multiple functions and adapt to various operating conditions without increasing complexity.
Data Source
AI summary
A sequencer circuit is configured to generate control signals for on-die memory control circuitry. The control signals may include memory operation pulses for implementing operations on selected non-volatile memory cells embodied within the same die as the sequencer (and other on-die memory control circuitry). The timing, configuration, and/or duration of the memory control signals are defined in configuration data, which can be modified after the design and/or fabrication of the die and/or on-die memory circuitry. As such, the timing, configuration, and/or duration of the memory control signals generated by the sequencer may be manipulated after the design and/or fabrication of the die, sequencer, and other on-die memory control circuitry.