On-Die Terminators Using Coarse and Fine Resistors
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Solution Overview
Problem
Existing on-die terminators for semiconductor devices face challenges in balancing reduced chip area usage with high accuracy and scalability, as they either occupy large areas due to low current density polysilicon resistors or suffer from high resistance variations with n-well resistors.
Innovation Solution
The use of a combination of coarse well resistors and fine polysilicon resistors, with switches to adjust resistance, allows for precise impedance matching with reduced chip area usage and improved scalability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If polysilicon resistors are used for on-die terminators, then resistance accuracy is improved (PVT variations are minimized), but chip area increases due to low current density requirements
Solution Approach 1:
The patent segments the resistor structure into two distinct parts: polysilicon resistor strips (for accuracy) and n-well resistive regions (for current handling). This segmentation allows each material to perform its specialized function, with the polysilicon providing precise resistance values and the n-well handling high current density, thereby resolving the contradiction between accuracy and area.
Solution Approach 2:
The patent employs a composite resistor structure combining polysilicon and n-well materials in a single resistor unit. The polysilicon strips are formed over the n-well regions, creating a composite structure that leverages the low PVT variation of polysilicon for accuracy while utilizing the high current density capability of n-well to reduce the required chip area.
2Area of stationary object
If n-well resistors are used for on-die terminators, then chip area is reduced due to high current density capability, but resistance accuracy deteriorates (PVT variations increase)
Solution Approach 1:
The resistor is segmented into polysilicon strips layered over n-well regions, where the polysilicon segment provides the accurate resistance value (low PVT variation) and the n-well segment provides the current handling capability. This segmentation allows the n-well to be used for area reduction without sacrificing accuracy, as the polysilicon layer compensates for PVT variations.
Solution Approach 2:
The composite structure of polysilicon strips over n-well regions creates a resistor that combines the advantages of both materials: the polysilicon provides temperature and voltage stability for accurate resistance, while the n-well provides high current density to reduce chip area. The composite material approach resolves the contradiction between area reduction and accuracy maintenance.
3Productivity
If polysilicon strips are made thinner to match down-scaling of integrated circuits, then device integration is improved, but maximum endurable current decreases
Solution Approach 1:
The patent creates a composite resistor where thin polysilicon strips (enabling device integration and down-scaling) are formed over thicker n-well regions (providing current handling capability). The n-well region acts as a current-carrying substrate that supports the thin polysilicon layer, allowing the polysilicon to be made thinner for better integration while the n-well maintains the maximum endurable current.
Solution Approach 2:
The n-well region serves as an intermediary structure that mediates between the thin polysilicon strips (which need to be thin for integration) and the current requirements (which need high current density). The n-well acts as a current-carrying medium that allows the thin polysilicon to function at higher currents than it could alone, thus resolving the contradiction between integration and power handling.
Data Source
AI summary
An integrated circuit includes a semiconductor substrate; a first node; a second node; and a first plurality of resistors, each in a first plurality of resistor units. Each of the first plurality of resistor units includes a first end connected to the first node, and a second end connected to the second node. The integrated circuit further includes a second plurality of resistors, each in a second plurality of resistor units. Each of the second plurality of resistor units includes a first end connected to the first node, and a second end connected to the second node. The first plurality of resistors is formed of a first material. The second plurality of resistors is formed of a second material different from the first material. The integrated circuit further includes a switch in one of the first and the second plurality of resistor units and serially connected to a resistor.


