On-Die Process Monitor Circuit for VTH Extraction and I-V Curves
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Solution Overview
Problem
Existing technologies lack an on-die process monitor capable of generating precise I-V curves and accurately extracting threshold voltage (VTH) in both linear and saturation regions, as well as local mismatch, which is crucial for dynamic voltage scaling and real-time VTH measurements.
Innovation Solution
A fully integrated process monitor (PM) that includes a current source circuitry, drain-source and gate-source voltage regulation, and measurement circuitry to generate I-V curves and extract VTH, using techniques like switched capacitor circuits and discrete-time sigma-delta modulators for accurate VTH measurements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If VTH extraction is done using off-chip scribe line methods, then measurement capability is available, but integration and real-time monitoring are lost
Solution Approach 1:
The patent merges the process monitor functionality directly into the on-die circuitry by integrating current source circuitry, voltage regulation circuitry, and measurement circuitry into a single unified structure that can measure VTH of transistors on the same chip, eliminating the need for separate off-chip scribe line measurements
Solution Approach 2:
The process monitor is designed with multi-functionality to measure VTH in both linear and saturation regions, extract local mismatch, and provide real-time monitoring capabilities, making it applicable to various transistor types and operating conditions rather than being limited to a single measurement mode
2Ease of operation
If constant current method is used for VTH extraction, then simplicity is achieved, but accuracy in both linear and saturation regions cannot be obtained
Solution Approach 1:
The patent implements dynamic current control where the current source circuitry can adjust the current level based on the operating region (linear or saturation) of the transistor being measured. The voltage regulation circuitry dynamically regulates VDS to maintain constant conditions during measurement, enabling accurate VTH extraction in both regions while preserving operational simplicity through automated control
Solution Approach 2:
The system changes the operating parameters (current level, voltage conditions) based on the measurement requirements for different regions. By adjusting these parameters through the regulation circuitry, the system achieves accurate measurements in both linear and saturation regions without requiring completely different measurement methodologies
3Adaptability or versatility
If accurate VTH extraction in both linear and saturation regions is implemented, then comprehensive process monitoring is achieved, but circuit complexity increases
Solution Approach 1:
The process monitor achieves universality by designing a single integrated structure that can measure VTH in both linear and saturation regions, extract local mismatch, and monitor multiple transistor types. This multi-functional design provides comprehensive process monitoring coverage without requiring separate dedicated circuits for each measurement type
Solution Approach 2:
The voltage regulation circuitry operates in a self-service manner by automatically regulating VDS to maintain constant conditions during measurement. The system self-adjusts to the appropriate operating mode (linear or saturation) based on the measurement requirements, reducing the need for external control complexity while achieving comprehensive measurement coverage
Data Source
AI summary
A new architecture of an on-die process monitor circuit is described, without limitation, in 28 nm. The circuit can extract the threshold voltage, VTH, and random mismatch of a transistor using multiple extraction methods, such as but not limited to, the second derivative method. A sigma-delta modulator analog-to-digital converter may sample the output to enable on-die processing of the results. A VDS voltage control loop may be used to enable VTH extraction in both the linear and saturation regions of the device. The circuit may have a compact area of 5510 μm2.