One-Bit RF Transceiver Architecture Using Dithered Signal Conversion

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Solution Overview

Problem

Radio frequency transceivers have high costs, mass, and power consumption due to complex analog components, necessitating a simpler, low-cost analog radio frequency portion.

Innovation Solution

A radio frequency system with a one-bit receiver and transmitter, utilizing a digital pseudo random noise generator, one-bit digital to analog and analog to digital converters, a power combiner, and digital subtraction circuit, all implemented in a field programmable gate array, to reduce complexity and increase efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional analog radio frequency components are used, then signal processing capability is improved, but cost, mass, and power consumption increase significantly

Engineering Contradiction:
Improvesignal processing capabilityVSAvoidanalog component complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces traditional analog radio frequency components with a digital system implemented in an FPGA. The analog-to-digital converter samples the radio frequency signal directly, and all signal processing is performed using digital logic circuits within the FPGA, eliminating the need for complex analog components while maintaining signal processing capability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the fundamental operating parameters by using a one-bit quantized representation of the radio frequency signal instead of traditional multi-bit digital representations. This parameter change allows the use of simplified digital circuits with only one bit width for all internal processing, significantly reducing device complexity while preserving the essential signal characteristics through statistical processing.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If traditional analog radio frequency components are used, then signal processing capability is improved, but cost increases

Engineering Contradiction:
Improvesignal processing capabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent replaces expensive analog radio frequency components with a digital system implemented in an FPGA. The analog-to-digital converter samples the radio frequency signal directly, and all signal processing is performed using digital logic circuits within the FPGA, eliminating the need for complex analog components while maintaining signal processing capability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent uses a one-bit quantized representation that can be processed by simple, low-cost digital circuits. The one-bit analog-to-digital converter and subsequent digital logic require minimal hardware resources, making the system much more cost-effective to manufacture compared to traditional analog radio frequency systems.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Reliability

If traditional analog radio frequency components are used, then signal processing capability is improved, but power consumption increases

Engineering Contradiction:
Improvesignal processing capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces power-hungry analog radio frequency components with a digital system implemented in an FPGA. The analog-to-digital converter samples the radio frequency signal directly, and all signal processing is performed using digital logic circuits within the FPGA, eliminating the need for complex analog components while maintaining signal processing capability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the fundamental operating parameters by using a one-bit quantized representation of the radio frequency signal instead of traditional multi-bit digital representations. This parameter change allows the use of simplified digital circuits with only one bit width for all internal processing, significantly reducing device complexity while preserving the essential signal characteristics through statistical processing.

Inventive Principle:
Principle #35Parameter changes

4Device complexity

If one-bit quantization is used, then device complexity is reduced, but measurement precision decreases

Engineering Contradiction:
Improvedigital circuit complexityVSAvoidsignal resolution
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent maintains continuous sampling of the radio frequency signal at a high rate, ensuring that the one-bit quantized representation captures the essential signal characteristics over time. The continuous stream of one-bit samples is processed through digital filtering and correlation operations that accumulate information, effectively recovering signal details that would be lost in single-sample quantization.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent employs digital correlation processing that compares the received one-bit quantized signal with known spreading codes or reference signals. This feedback-based correlation process allows the system to extract precise signal information from the coarse one-bit quantization by leveraging the known structure of the transmitted signal and statistical properties of the quantization noise.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10707913B2Composable transceiver using low bit count inputs and outputs
Publication Date: 2020.07.07 RAYTHEON CO
  • US10707913B2 patent drawing
  • US10707913B2 patent drawing
  • US10707913B2 patent drawing

AI summary

A radio frequency system. In some embodiments, the system includes a one-bit receiver, and the one-bit receiver includes a digital pseudo random noise generator, a one-bit digital to analog converter, a power combiner, a one-bit analog to digital converter, and a digital subtraction circuit. The digital pseudo random noise generator produces a signal added to the received signal before analog to digital conversion. After analog to digital conversion, a delayed version of the dither is subtracted from the digital signal.