Asynchronous One-Phase Logic Circuit Power Reduction
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Solution Overview
Problem
Asynchronous digital systems face challenges in reducing power and area consumption while maintaining performance, particularly in implementing efficient communication protocols without centralized control or global clock signals.
Innovation Solution
The implementation of asynchronous one-phase logic circuits using programmable arrays of logic blocks, routing tracks, connection boxes, and switch boxes, which eliminate acknowledge signals in idle portions of pipelines and balance delays between data signals to reduce power and area consumption, and implement various handshake protocols for efficient data communication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If asynchronous handshake protocols with acknowledge signals are used, then communication reliability is improved, but power consumption and area increase
Solution Approach 1:
The patent extracts and eliminates the acknowledge signal from the traditional two-phase handshake protocol, reducing the number of signal transitions and associated power consumption while maintaining sufficient communication reliability through the simplified one-phase protocol
Solution Approach 2:
The patent changes the protocol parameter from two-phase handshake with acknowledge signals to one-phase logic without acknowledge signals, fundamentally altering the communication mechanism to reduce power consumption and area while maintaining functionality
2Reliability
If traditional two-phase handshake protocols are implemented, then communication reliability is improved, but device complexity and area increase
Solution Approach 1:
The patent removes the acknowledge signal component from the handshake protocol, simplifying the communication mechanism from two-phase to one-phase logic and reducing the complexity of control circuits and signal routing
Solution Approach 2:
Instead of using the traditional approach of adding acknowledge signals to ensure reliability, the patent inverts the approach by eliminating unnecessary signals and relying on the inherent timing and data flow control of one-phase logic to maintain communication reliability
3Use of energy by moving object
If asynchronous logic circuits are used, then power consumption is reduced, but delay matching between data signals becomes difficult
Solution Approach 1:
The patent segments the asynchronous logic circuit into independent one-phase pipeline stages, each handling data transmission without require precise delay matching between signals, as each stage operates independently with its own data flow control
Solution Approach 2:
The one-phase logic circuit self-regulates data flow through its inherent timing mechanisms, eliminating the need for external delay balancing and synchronize signals, as each pipeline stage automatically adapts to varying delay conditions
4Use of energy by moving object
If one-phase logic is implemented, then power consumption and area are reduced, but processing speed may be affected
Solution Approach 1:
The one-phase logic pipeline enables continuous data flow through multiple stages without the pause and acknowledge cycles of traditional handshake protocols, maintaining high processing speed while reducing power consumption through eliminated signal transitions
Data Source
AI summary
Circuits comprising asynchronous linear pipelines and one-phase pipelines, and methods of forming asynchronous linear pipeline circuits and converting them to one-phase pipeline circuits are provided. Additional circuits, systems and methods are disclosed.