One-Shot Circuit Shielding Window for False Pulse Immunity

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Solution Overview

Problem

Existing one-shot circuits may be triggered mistakenly by abnormal pulses in the input signal, affecting their application in low-speed logic chips.

Innovation Solution

A one-shot circuit design that includes a one-shot main circuit and a shielding time window circuit. The one-shot main circuit receives input signals, feedback from the output signal, and a time window signal from the shielding circuit, using a NOR gate and RC delay circuits to generate the output signal. The shielding time window circuit generates a time window signal that resists interference from abnormal input pulses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional one-shot circuit is used, then the circuit can generate output pulses with fixed time width, but the circuit may be triggered by mistake by abnormal pulses in the input signal

Engineering Contradiction:
Improvetrigger reliabilityVSAvoidfalse triggering by abnormal pulses
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The shielding time window circuit generates a shielding signal in advance during the time window period, which is then fed back to the NOR gate to block abnormal pulses before they can trigger false output. This preliminary action prevents false triggering by preparing the blocking mechanism before the harmful effect can occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The circuit uses feedback by taking the output signal and generating a shielding signal through the shielding time window circuit, then feeding this shielding signal back to the NOR gate. This feedback mechanism dynamically blocks abnormal pulses during the time window period, improving trigger reliability while maintaining the fixed pulse width function.

Inventive Principle:
Principle #23Feedback

2Reliability

If a shielding time window circuit is added to prevent false triggering, then the reliability improves, but the device complexity increases

Engineering Contradiction:
Improvetrigger reliabilityVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The shielding time window circuit is merged with the original one-shot circuit by sharing the NOR gate and integrating the feedback path. The shielding signal generation is combined with the existing output signal routing, so the additional functionality is achieved with minimal extra components rather than completely separate circuits.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The NOR gate serves multiple functions: it processes the original input signal for normal triggering, receives the feedback signal for pulse width control, and simultaneously processes the shielding signal to block abnormal pulses. This multi-functionality reduces the need for separate dedicated components for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed one-shot circuit effectively prevents false triggering by abnormal input pulses, ensuring reliable operation by creating a time window during which the circuit is immune to such interference.

Implementation Method 1

The first RC delay circuit is configured to delay a signal through the charging and discharging of a capacitor

Methodology Applied
Scientific EffectCharging and discharging of capacitor: Capacitance

Data Source

PatentUS12334927B2One-shot circuit
Publication Date: 2025.06.17 SG MICRO CORP
  • US12334927B2 patent drawing
  • US12334927B2 patent drawing
  • US12334927B2 patent drawing

AI summary

A one-shot circuit is provided. The one-shot circuit includes a one-shot main circuit and a shielding time window circuit. The one-shot main circuit is configured to receive, through a NOR gate, an input signal of the one-shot circuit, the feedback of an output signal of the one-shot circuit, and a time window signal output by the shielding time window circuit, and then obtain the output signal through a first RC delay circuit and a logic gate. The time window signal is a signal that resists the interference of the abnormal pulse of the input signal with the output signal. The shielding time window circuit is configured to receive the feedback of the output signal, and then obtain the time window signal through a second RC delay circuit and a logic gate.