ONO Layer Plasma Etching in Slits Without Residue or Pattern Collapse
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Solution Overview
Problem
The existing wet etching methods for removing the oxide-nitride-oxide (ONO) layer in semiconductor manufacturing processes face challenges such as residue adherence, pattern collapse, selectivity control, and surface roughness deterioration.
Innovation Solution
A semiconductor manufacturing process involving the deposition of an inhibition layer using a halogen element with an alkyl group on the inner slit wall, followed by plasma etching and thermal removal of the inhibition layer, to effectively remove the ONO layer while preventing residues and optimizing surface roughness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If wet etching method is used to remove the ONO layer, then the etching process can be performed, but residues remain and adhere to the inner wall of the slit
Solution Approach 1:
A polymer inhibition layer is introduced as an intermediary substance between the etchant and the slit inner wall. This layer prevents direct contact between the etchant and the slit wall, thereby preventing residue adherence while allowing the etching process to proceed efficiently. The inhibition layer is applied to the slit inner wall before etching and selectively removed after etching.
2Productivity
If wet etching method is used to remove the ONO layer, then the etching process can be performed, but the pattern may collapse due to surface tension of solvent during drying
Solution Approach 1:
The polymer inhibition layer serves as a protective intermediary that prevents the solvent from directly contacting the pattern structure during the drying process. By blocking the solvent's path, the inhibition layer eliminates the surface tension forces that would otherwise cause pattern collapse, while not interfering with the etching process when the layer is present during etching.
3Productivity
If wet etching method is used to remove the ONO layer, then the etching process can be performed, but it is difficult to control ion concentration of the etchant, making it difficult to control selectivity with respect to materials
Solution Approach 1:
The patent replaces the liquid-based wet etching mechanism with a plasma-based etching mechanism. Plasma etching allows for precise control of etchant composition and ion concentration through gas flow control and plasma parameter adjustment, enabling better selectivity control while maintaining high etching efficiency. The polymer inhibition layer continues to protect the slit wall during this plasma etching process.
4Productivity
If etchant is supplied to the slit during wet etching, then the ONO layer can be removed, but when the etchant volatilizes, the vertical layer may be damaged, resulting in deterioration of surface roughness
Solution Approach 1:
The polymer inhibition layer acts as a protective barrier that prevents the etchant from directly contacting and damaging the vertical layer structure. As the etchant volatilizes or is removed, the inhibition layer remains in place to protect the vertical layer, preventing surface roughness deterioration. The inhibition layer is subsequently removed through thermal treatment or other methods after the etching is complete.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed process prevents residue adherence, maintains pattern integrity, controls etching selectivity, and optimizes surface roughness, thereby enhancing the overall efficiency and quality of the semiconductor manufacturing process.
Implementation Method 1
an inhibition layer deposition step of supplying a halogen element having an alkyl group to the slit to form an inhibition layer on an inner wall of the slit
Implementation Method 2
a plasma etching step of etching the ONO layer
Implementation Method 3
a plasma etching step of etching the ONO layer
Implementation Method 4
an inhibition layer removal step of removing the inhibition layer through thermal treatment
Data Source
AI summary
Disclosed are a semiconductor manufacturing process capable of preventing residues from remaining, preventing a pattern from collapsing, controlling selectivity, and optimizing surface roughness, a semiconductor device manufactured through the semiconductor manufacturing process, and a substrate processing apparatus configured to perform the semiconductor manufacturing process. The semiconductor manufacturing process is performed to remove an oxide-nitride-oxide (ONO) layer formed on an outer side of a vertical layer in a horizontal space between a substrate and a base layer in a semiconductor pattern.