ONO Stack Quality Monitoring via Differential Tunneling Voltage
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Solution Overview
Problem
Conventional methods for testing oxide-nitride-oxide (ONO) stack quality in non-volatile memory transistors are inefficient, as they require weeks to identify issues with the stack composition, leading to delayed detection of malfunctions and reduced yield of devices meeting specified parameters.
Innovation Solution
A method and structure for determining ONO stack quality by measuring differential tunneling voltage through a corona charge method, allowing for inline monitoring of program/erase efficiency and threshold voltage window, enabling early detection of stack quality issues during fabrication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional testing methods are used to test completed packaged devices, then device functionality can be verified, but the testing time is extended to weeks and yield is reduced
Solution Approach 1:
The patent performs ONO stack quality assessment during the fabrication process using tunneling voltage measurements before the device is completed and packaged. This preliminary testing approach allows detection of stack quality issues early, avoiding the need to wait weeks for conventional post-packaging testing while maintaining reliability verification
Solution Approach 2:
The patent replaces the conventional electrical testing approach (which requires completed devices with contacts) with a physical measurement approach using tunneling voltage measurements on the ONO stack structure itself. This substitution enables testing during fabrication without requiring the complete device assembly, dramatically reducing testing time
2Reliability
If conventional testing methods are used, then device functionality can be verified, but fabrication problems are detected late leading to reduced yield
Solution Approach 1:
The patent implements a feedback mechanism where tunneling voltage measurements are taken during fabrication and used to assess ONO stack quality in real-time. This feedback allows immediate detection of fabrication problems and enables corrective actions before proceeding to subsequent processing steps, thereby improving overall device yield
Solution Approach 2:
By performing quality assessment preliminarily during fabrication rather than after completion, the patent enables early detection of issues that would otherwise lead to wasted manufacturing resources and reduced yield. The preliminary tunneling voltage measurement identifies problematic stacks before further processing occurs
3Loss of time
If inline monitoring is implemented during fabrication, then early detection of quality issues is enabled, but additional measurement steps are added to the process
Solution Approach 1:
The patent extracts the quality assessment function from the final device testing stage and applies it to the ONO stack structure during fabrication. By taking out the measurement requirement from the completed device context and applying it to the intermediate stack structure, the patent enables early detection without adding complex final testing procedures
Solution Approach 2:
The patent replaces complex electrical characterization measurements with simpler tunneling voltage measurements that can be performed on the ONO stack during fabrication. This substitution reduces measurement complexity while enabling inline monitoring, as the tunneling voltage measurement requires less sophisticated equipment and can be integrated into the fabrication flow
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables early detection of ONO stack quality issues, reducing the time and cost associated with identifying and correcting fabrication problems, thereby improving the yield of devices meeting specified parameters and extending the operating life of memory devices.
Implementation Method 1
A method and structure for determining ONO stack quality by measuring differential tunneling voltage through a corona charge method
Implementation Method 2
The positive bias causes electrons from source and drains regions of the transistor to tunnel through the lower oxide layer of the ONO stack and become trapped in the nitride layer
Data Source
AI summary
Structures and methods are provided for determining operating characteristics of a non-volatile memory transistor comprising a charge-storage-layer and a tunneling-layer. In one embodiment, the method comprises: forming a structure including a charge-storage-layer overlying a tunneling-layer on a substrate; depositing a positive charge on the charge-storage-layer and determining a first voltage to establish a first leakage current through the charge-storage-layer and the tunneling-layer; depositing a negative charge on the charge-storage-layer and determining a second voltage to establish a second leakage current through the charge-storage-layer and the tunneling-layer; and determining a differential voltage by calculating a difference between the first and second voltages. Other embodiments are also disclosed.