On-Time Generator Delay Correction for Comparator Timing Error
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Solution Overview
Problem
Existing switch mode power converter designs experience errors in switching frequency due to delays introduced by comparator architectures, which can lead to inaccuracies in the on-time generation for power switches.
Innovation Solution
A delay correction circuit is implemented, comprising a sample-hold circuit, an amplifier, and a variable resistor, which adjusts the capacitor voltage to compensate for the turn-on delay of the comparator output signal, ensuring the ramp signal crosses the reference voltage at the correct time, thereby neutralizing the propagation delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a comparator is used to generate timing signals for power switches, then the switching timing can be controlled, but propagation delay is introduced causing frequency error
Solution Approach 1:
The circuit performs preliminary action by capturing the capacitor voltage at the exact moment the comparator triggers (via sample-hold circuitry) and using this captured voltage to pre-adjust the capacitor charging curve. This allows the system to compensate for the known propagation delay before it affects the timing, ensuring the ramp signal crosses the reference voltage at the correct time despite the comparator's inherent delay.
Solution Approach 2:
The circuit implements feedback by continuously monitoring the comparator output and using it to dynamically adjust the capacitor voltage through the variable resistor. The captured capacitor voltage at the trigger moment feeds back into the system to modify subsequent charging behavior, creating a closed-loop compensation mechanism that eliminates frequency errors caused by propagation delay.
2Reliability
If delay correction circuitry is added to compensate for comparator propagation delay, then frequency accuracy is improved, but circuit complexity increases
Solution Approach 1:
The circuit merges multiple functions into a unified architecture where the sample-hold circuitry, voltage capture mechanism, and capacitor adjustment logic work together as an integrated delay compensation system. By combining these functions rather than adding separate compensation circuits, the design achieves frequency accuracy improvement while minimizing the increase in overall circuit complexity.
Solution Approach 2:
The circuit employs self-service by using its own comparator output signal to trigger the sampling action and control the adjustment process. The system automatically captures the relevant voltage information and performs the necessary compensation without requiring external control signals or additional complexity, making the delay correction inherent to the circuit's normal operation.
Data Source
AI summary
A circuit includes a comparator having first and second comparator inputs and a comparator output. A discharge switch is coupled between the first comparator input and a ground terminal. A capacitor has first and second capacitor terminals, in which the first capacitor terminal is coupled to the first comparator input. A delay correction circuit includes a sample-hold circuit coupled to the first capacitor terminal and the second capacitor terminal. An amplifier has a first amplifier input coupled to a hold output of the sample-hold circuit and a second amplifier input coupled to the second comparator input. A variable resistor is coupled between the second capacitor terminal and the ground terminal, and has a control input coupled to the amplifier output.