Optical Network Unit Router Memory Access Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Multi-core network processing units (NPUs) experience contention conflicts for shared memory, leading to reduced overall performance due to the need for cores to wait for each other to release memory access, which degrades data processing speed as network applications become more diverse and data volumes increase.
Innovation Solution
A proxy mechanism is introduced, utilizing a shared resource pool and allocated queues to manage memory access, where each core is assigned a dedicated queue for memory allocation, allowing for independent access to reserved memory address ranges without the need for locking, thereby reducing waiting times and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-core NPUs are used to increase data processing speed, then processing capacity is improved, but contention conflicts for shared memory increase leading to degraded overall performance
Solution Approach 1:
The shared memory is segmented into multiple dedicated queues (first allocated queue, second allocated queue, etc.), with each queue assigned to a specific core. This segmentation eliminates contention by providing each core with its own dedicated memory access path, resolving the contradiction between multi-core processing capacity and shared memory access conflicts.
2Productivity
If multiple cores access shared memory simultaneously, then parallel processing capability is improved, but memory access contention increases causing cores to wait for each other
Solution Approach 1:
Each core is assigned a specific dedicated queue with unique characteristics (first allocated queue for first core, second allocated queue for second core). This local quality assignment ensures that each core operates independently with its own memory resources, eliminating the need for synchronization and improving both parallel processing capability and memory access efficiency.
Data Source
AI summary
The invention relates to a method, a non-transitory computer-readable storage medium and an optical network unit (ONU) router for memory access control. The method, which is performed by a central processing unit (CPU), includes: obtaining an identification of a core; determining one from multiple allocated queues according to the identification of the core; and dequeuing one or more items in a shared resource pool starting from a slot that is pointed to by a take index, and enqueuing the one or more items into the determined allocated queue starting from an empty slot that is pointed to by a write index. Each item stored in the determined allocated queue includes a memory address range of a random access memory (RAM), so that the memory address range of the RAM has been reserved for the first core.


