Operational Amplifier Offset Cancellation Using a Current-Mirror Capacitor

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Solution Overview

Problem

Operational amplifiers often exhibit offset voltages due to manufacturing variations, causing differences between actual and desired output voltages, which existing technologies have not effectively addressed.

Innovation Solution

An operational amplifier design featuring a front stage and output stage with a current mirror and an offset canceling capacitor, where the offset canceling capacitor is programmed with an offset canceling voltage to reduce the offset voltage, effectively canceling the voltage difference between nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If manufacturing processes are used to create operational amplifiers, then production is achieved, but offset voltage errors are introduced due to manufacturing variations

Engineering Contradiction:
Improveproduction capabilityVSAvoidoutput voltage accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by storing compensation values in memory before the operational amplifier operates. The system pre-calculates offset compensation values during manufacturing or initialization, stores them in memory, and retrieves them during operation to cancel manufacturing-induced errors. This allows mass production while maintaining precision through pre-prepared correction data.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by measuring the actual offset voltage, calculating compensation values based on these measurements, and using these compensation values to adjust the operational amplifier's output. The system continuously monitors and corrects for manufacturing variations through this closed-loop feedback mechanism, ensuring accuracy despite production variations.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If offset voltage compensation is implemented, then output voltage accuracy is improved, but device complexity increases

Engineering Contradiction:
Improveoutput voltage accuracyVSAvoidcircuit structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces memory as an intermediary component that stores compensation values between the measurement system and the operational amplifier. This intermediary allows the system to handle complex compensation calculations and storage externally, keeping the core operational amplifier circuit relatively simple while still achieving high precision through the mediating memory structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces complex analog compensation circuits with a digital approach using memory and digital-to-analog conversion. Instead of using complex analog circuitry to physically compensate for offset voltages, the system uses digital storage and conversion, substituting mechanical/analog complexity with digital processing that achieves the same compensation goal more efficiently.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11353909B2Operational amplifier, integrated circuit, and method for operating the same
Publication Date: 2022.06.07 SYNAPTICS INC
  • US11353909B2 patent drawing
  • US11353909B2 patent drawing
  • US11353909B2 patent drawing

AI summary

An operational amplifier comprises a front stage and an output stage. The front stage comprises a first input transistor, a second input transistor, a first node, a second node, and a first current mirror. A first voltage based on a first current through the first input transistor is generated on the first node. A second voltage based on a second current through the second input transistor is generated on the second node. The output stage is configured to output an output voltage based on at least one of the first voltage and the second voltage. The first current mirror comprises a first transistor having a drain connected to the first node, a second transistor having a drain connected to the second node, and a first offset canceling capacitor connected between gates of the first transistor and the second transistor.