Rail-To-Rail Op-Amp Offset Correction With Dual MOS Input Pairs
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Solution Overview
Problem
Operational amplifiers face challenges in correcting input offset voltage over a wide voltage range, particularly in low-voltage applications where Rail-To-Rail operation is required, due to transistor mismatches and inefficiencies in current switching.
Innovation Solution
The operational amplifier incorporates a PMOS and NMOS input differential pair with correction circuits that adjust offset voltages through dedicated correction differential amplifiers and gm amplifiers, mirroring differential currents and switching based on input voltages to reduce wasteful current and correct offset voltages across various operation regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single correction circuit is used for Rail-To-Rail operational amplifier, then the circuit complexity is reduced, but the input offset voltage cannot be corrected over a wide voltage range
Solution Approach 1:
The correction circuit is divided into two separate segments: a first correction circuit for correcting offset voltage in the PMOS input differential pair and a second correction circuit for correcting offset voltage in the NMOS input differential pair. Each correction circuit operates effectively in its respective operation region, enabling wide-range offset voltage correction across the entire Rail-To-Rail input voltage range without requiring a single complex correction mechanism.
2Use of energy by moving object
If current switching between PMOS and NMOS differential pairs is implemented, then the power consumption is reduced, but the switching timing and current transfer accuracy deteriorate
Solution Approach 1:
The second correction circuit receives feedback from the first correction circuit through a current mirror mechanism. The first correction circuit generates a correction current that is mirrored and transferred to the second correction circuit, ensuring accurate current transfer and synchronized operation. This feedback mechanism maintains current transfer accuracy while enabling efficient switching between PMOS and NMOS differential pairs to reduce power consumption.
Data Source
AI summary
Disclosed herein is an operational amplifier including a non-inverting input terminal, an inverting input terminal, a P-type metal oxide semiconductor input differential pair, a first input tail current source, an N-type metal oxide semiconductor input differential pair, a second input tail current source, an output stage, a first correction circuit, and a second correction circuit. The first correction circuit and the second correction circuit operate over an operation region of the P-type metal oxide semiconductor input differential pair, an operation region of the N-type metal oxide semiconductor input differential pair, and a transition region in which both the P-type metal oxide semiconductor input differential pair and the N-type metal oxide semiconductor input differential pair operate.