Operational Amplifier Overdriving Circuit for RC Delay Compensation
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Solution Overview
Problem
Operational amplifiers struggle to reach a target voltage within a given operation time when the RC delay time is large due to high values of resistor and capacitor connected to the output terminal, despite having a high slew rate.
Innovation Solution
Incorporating an overdriving circuit with first and second overdriving units configured to perform overdriving operations at rising and falling edges, respectively, and a buffer unit to provide output voltage, utilizing PMOS and NMOS transistors and switches to manage bias currents and offset currents effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the values of resistor and capacitor connected to the output terminal are increased, then the load capacity is improved, but the RC delay time increases causing the output voltage to fail to reach target voltage within operation time
Solution Approach 1:
The overdriving circuit performs preliminary action by outputting a voltage higher than the target voltage before the normal operation phase. This preliminary overdrive charge compensates for the RC delay, enabling the output voltage to reach the target voltage within the required operation time despite large capacitor values.
Solution Approach 2:
The overdriving circuit applies excessive action by temporarily providing more current than normally required to quickly charge the capacitor. The first overdriving unit provides excessive current during the rising edge, and the second overdriving unit provides excessive current during the falling edge, ensuring the voltage transition completes within the operation time.
2Speed
If the slew rate is increased to reach target voltage faster, then the response speed is improved, but the circuit complexity increases
Solution Approach 1:
The overdriving circuit is segmented into distinct functional units: a first overdriving unit for rising edge transitions, a second overdriving unit for falling edge transitions, and a buffer unit for output. This segmentation allows each unit to be optimized independently while working together to achieve high response speed without excessive overall complexity.
Solution Approach 2:
The overdriving circuit operates periodically based on the clock signal, with the first overdriving unit activated during the rising edge phase and the second overdriving unit activated during the falling edge phase. This periodic activation pattern manages complexity by enabling overdrive functionality only when needed rather than continuously.
Data Source
AI summary
Disclosed is an operational amplifier including an overdriving circuit capable of reaching a target voltage within an operation time by outputting a higher voltage than the target voltage when an RC delay time is greater. The operational amplifier may including an overdriving circuit, in which first and second input terminals and an output terminal may be provided, an input voltage may be applied to the first input terminal, a second input terminal may be connected to the output terminal, and the input voltage applied to the first input terminal may be overdriven to have a certain level to be outputted to the output terminal, may include: first and second overdriving units performing an overdriving operation at a rising edge and a falling edge, respectively.