Op Amp Output Stage With Segmented Well Connections
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Solution Overview
Problem
Operational amplifier circuits with Class AB push-pull source follower circuits face issues with narrow output voltage range and deteriorated frequency characteristics due to conventional configurations.
Innovation Solution
The operational amplifier circuit incorporates a specific configuration of nMOSFETs and pMOSFETs with unique well connections and gate-source configurations to amplify voltage, suppressing threshold voltage increases and parasitic capacitance, thereby broadening the output voltage range while maintaining good frequency characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a conventional push-pull source follower circuit is used as the output amplifier stage, then consumption current is reduced in bias state, but the output voltage range becomes narrow and frequency characteristics deteriorate
Solution Approach 1:
The output amplifier stage is segmented into four separate MOS transistors (first nMOS, second nMOS, first pMOS, second pMOS) with distinct well connections. Each transistor's well is independently connected to reference terminals or the output terminal, allowing independent optimization of each device's threshold voltage and parasitic capacitance characteristics, thereby expanding the overall output voltage range while maintaining low consumption current.
Solution Approach 2:
Different well connection configurations are applied to different transistors within the same output stage. Specifically, the first nMOS has its well connected to a first reference terminal, the second nMOS to a second reference terminal, the first pMOS to the first reference terminal, and the second pMOS to the second reference terminal. This local differentiation allows each transistor to operate with optimized threshold voltages, preventing the output voltage range from being narrowed while maintaining Class AB operation.
2Use of energy by moving object
If a conventional push-pull source follower circuit is used as the output amplifier stage, then consumption current is reduced in bias state, but frequency characteristics deteriorate
Solution Approach 1:
The output amplifier stage is segmented into four separate MOS transistors (first nMOS, second nMOS, first pMOS, second pMOS) with distinct well connections. Each transistor's well is independently connected to reference terminals or the output terminal, allowing independent optimization of each device's threshold voltage and parasitic capacitance characteristics, thereby expanding the overall output voltage range while maintaining low consumption current.
Solution Approach 2:
Different well connection configurations are applied to different transistors within the same output stage. Specifically, the first nMOS has its well connected to a first reference terminal, the second nMOS to a second reference terminal, the first pMOS to the first reference terminal, and the second pMOS to the second reference terminal. This local differentiation allows each transistor to operate with optimized threshold voltages, preventing the output voltage range from being narrowed while maintaining Class AB operation.
3Speed
If wells are connected to reduce parasitic capacitance, then frequency characteristics improve, but threshold voltage increases and output voltage range narrows
Solution Approach 1:
Different well connection configurations are applied to different transistors within the same output stage. Specifically, the first nMOS has its well connected to a first reference terminal, the second nMOS to a second reference terminal, the first pMOS to the first reference terminal, and the second pMOS to the second reference terminal. This local differentiation allows each transistor to operate with optimized threshold voltages, preventing the output voltage range from being narrowed while maintaining Class AB operation.
Solution Approach 2:
The patent changes the well connection parameters of the MOS transistors to optimize both threshold voltage and parasitic capacitance. By connecting wells to appropriate reference terminals or output terminals based on specific design requirements, the threshold voltages are controlled to prevent narrowing of the output voltage range, while parasitic capacitance is reduced to maintain good frequency characteristics.
Data Source
AI summary
In an output amplifier stage of an operational amplifier circuit, the first p-well of the first nMOSFET and the second p-well of the second nMOSFET are connected to the fourth node. Further, the first n-well of the first pMOSFET and the second n-well of the second pMOSFET are connected to the fifth node. At least one of the fourth node and the fifth node is connected to an output terminal VOUT.


