Operational Amplifier Output Stage for Slew Rate and Leakage Control

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Solution Overview

Problem

Existing operational amplifiers face challenges with substantial leakage currents and slow slew rates, which affect power consumption and operational speed, hindering the performance of driver ICs and display technology.

Innovation Solution

The operational amplifier incorporates a series connection of P-type and N-type output transistors with control circuits to prevent leakage currents and enhance slew rate by using first and second leakage eliminating circuits and slew rate enhance circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the output voltage increases rapidly during the rising period, then the slew rate is enhanced, but the NMOS transistor of the output stage is activated due to capacitive coupling, causing substantial leakage current

Engineering Contradiction:
Improveslew rateVSAvoidleakage current
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent applies preliminary anti-action by introducing a control signal that preemptively counteracts the capacitive coupling effect. When the output voltage changes rapidly, the control circuit detects this change and generates a compensating control signal that prevents the NMOS transistor from being inadvertently activated, thereby eliminating the leakage current before it can occur.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent uses an intermediary control circuit that mediates between the rapid output voltage change and the NMOS transistor activation. This control circuit acts as an intermediary by generating a control signal that offsets the capacitive coupling effect, preventing the direct causal relationship between rapid voltage change and unwanted transistor activation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If the output voltage decreases rapidly during the falling period, then the slew rate is enhanced, but the PMOS transistor of the output stage is activated, causing unwanted leakage current

Engineering Contradiction:
Improveslew rateVSAvoidleakage current
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent applies preliminary anti-action by introducing a control signal that preemptively counteracts the capacitive coupling effect during the falling period. When the output voltage changes rapidly downward, the control circuit detects this change and generates a compensating control signal that prevents the PMOS transistor from being inadvertently activated, thereby eliminating the leakage current before it can occur.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent uses an intermediary control circuit that mediates between the rapid output voltage change and the PMOS transistor activation. This control circuit acts as an intermediary by generating a control signal that offsets the capacitive coupling effect, preventing the direct causal relationship between rapid voltage change and unwanted transistor activation.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If conventional OPA designs are used, then the structure is simple, but the leakage current is substantial and the power consumption is high

Engineering Contradiction:
Improvecircuit structureVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent applies universality by making the control circuit perform multiple functions: it monitors the output voltage changes, generates compensating control signals, and prevents both NMOS and PMOS transistor activations. This multi-functional approach allows the circuit to reduce leakage current without requiring separate dedicated circuits for each function, thereby limiting the increase in overall circuit complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Speed

If the OPA operates at high speed, then the display refresh rate is improved, but the power consumption increases due to leakage current

Engineering Contradiction:
Improveoperational speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies feedback by using the output voltage signal itself as the basis for generating the control signal. The control circuit continuously monitors the output voltage changes and dynamically adjusts the control signal to counteract capacitive coupling effects, creating a closed-loop system that automatically reduces leakage current during high-speed operation without requiring external intervention.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design significantly reduces leakage current, improving power efficiency and response speed, ensuring faster operations and reduced power loss.

Implementation Method 1

During the rising period, the rapid increase in output voltage may activate the NMOS transistor of the output stage due to capacitive coupling, leading to a substantial leakage current

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Implementation Method 2

During the falling period, a swift decrease in output voltage may inadvertently turn on the PMOS transistor of the output stage, causing another form of unwanted leakage current

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS20260031778A1Operational amplifier
Publication Date: 2026.01.29 HIMAX TECH LTD
  • US20260031778A1 patent drawing
  • US20260031778A1 patent drawing
  • US20260031778A1 patent drawing

AI summary

An operational amplifier (OPA) includes an output stage composed of a P-type output transistor and an N-type output transistor connected in series between a power supply and ground, the N-type output transistor being controlled by a first control voltage and the P-type output transistor being controlled by a second control voltage; a first leakage eliminating circuit configured to prevent a sinking current through the N-type output transistor from entering the ground when an input voltage rises from a low voltage level to a high voltage level; and a second leakage eliminating circuit configured to prevent a sourcing current through the P-type output transistor from entering a load when the input voltage falls from the high voltage level to the low voltage level.