Op-Amp Input Stage Self-Cascoding for High Common-Mode Rejection
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Solution Overview
Problem
Operational amplifiers (op amps) face challenges in rejecting common-mode input signals, leading to undesired output offset voltage errors due to finite common mode rejection ratio (CMRR), which is essential for minimizing the effects of common-mode voltage inputs.
Innovation Solution
The proposed solution involves a differential amplifier input stage configuration using transistors with strategically applied bias voltage sources to create a difference in threshold voltages, employing the body effect to ensure proper self-cascoding and maintain transistors in the saturation region, thereby reducing the impact of common-mode voltage changes on output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a differential amplifier is designed with conventional transistor configuration, then the circuit structure is simple, but the common mode rejection ratio (CMRR) is limited and output offset voltage errors occur
Solution Approach 1:
The differential amplifier input stage is segmented into multiple transistor stages. Specifically, each differential pair transistor is divided into two transistors connected in series between the current source and the output, creating a cascaded structure that improves CMRR by reducing common-mode gain while maintaining differential signal amplification
Solution Approach 2:
Different regions of the transistor structure are assigned different functions: the first transistor in each series pair handles the common-mode signal rejection, while the second transistor maintains the differential signal path. This local differentiation of function within the transistor chain enables improved common-mode rejection without sacrificing differential amplification performance
2Reliability
If bias voltage sources are applied to create threshold voltage differences, then common mode rejection is improved, but the circuit complexity and power consumption increase
Solution Approach 1:
The circuit uses self-biasing mechanisms where the transistors' own operating conditions and the inherent voltage drops across the series-connected transistor pairs automatically establish the required threshold voltage differences. This self-service approach achieves common-mode rejection improvement without requiring external bias voltage sources, thereby avoiding additional power consumption
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the common mode rejection ratio (CMRR) by minimizing changes in drain-to-source voltages and gate-to-source voltages, reducing output offset voltage errors and improving the accuracy of the amplifier.
Implementation Method 1
The disclosed embodiments advantageously use the body effect of transistors. The disclosed embodiments employ the body effect by connecting a bias voltage source across the source and substrate of one transistor in a cascade configuration while coupling the source and substrate of the other transistor in the cascade pair.
Data Source
AI summary
An apparatus has four transistors. The first and third transistors each have a gate coupled to a first input terminal and second input terminal respectively, a source coupled to a current source and to a first terminal of a bias voltage source, and a substrate coupled to a second terminal of the bias voltage source. The second and fourth transistors each have a gate coupled to the first input terminal and the second input terminal respectively, a source coupled to the drain of the first and third transistors respectively, a drain coupled to a lower voltage supply and a substrate coupled to its source. The bias voltage source increases the threshold voltages of the first and third transistors above the second and fourth transistors, respectively. This ensures that the first and third transistors turn on after the second and fourth transistors, respectively.