Environmental-Aware OPC for IC Layout Bridging Risks
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Solution Overview
Problem
Conventional Optical Proximity Correction (OPC) processes fail to fully account for the interactions between nearby layout patterns in semiconductor integrated circuits, leading to degraded performance and potential device failures due to image errors and bridging risks during fabrication.
Innovation Solution
An enhanced OPC process that groups IC layout patterns based on their proximity and environmental influences, adjusting dissection locations and target points within defined zones of interaction to better define contour edges and mitigate bridging risks, while maintaining compatibility with existing process flows.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional OPC processes are used, then the manufacturing process is simple and fast, but the manufacturing precision deteriorates due to unaccounted interactions between nearby layout patterns
Solution Approach 1:
The patent segments the OPC process into multiple sequential stages: initial OPC application, extraction of pattern contours, identification of zones of interaction, and secondary OPC application. This segmentation allows the complex task of accounting for pattern interactions to be broken down into manageable steps, improving manufacturing precision without overwhelming system complexity
Solution Approach 2:
The patent performs preliminary action by first applying conventional OPC to all patterns, then extracting contours and identifying zones of interaction before applying secondary OPC corrections. This preliminary OPC application establishes a baseline that the subsequent interaction-aware corrections build upon, ensuring both simplicity and precision
2Reliability
If conventional OPC processes are used, then the processing speed is fast, but the reliability deteriorates due to bridging risks and device failures
Solution Approach 1:
The patent applies local quality by identifying specific zones of interaction where pattern interactions occur and applying secondary OPC corrections only within these localized regions rather than uniformly across the entire layout. This approach improves reliability by targeting problematic areas while minimizing additional processing time through selective correction
Solution Approach 2:
The patent implements feedback by using the extracted pattern contours as input to identify zones of interaction, then using these identified zones to guide secondary OPC corrections. This feedback loop ensures that corrections are applied based on actual pattern interactions observed in the preliminary OPC results, improving reliability without excessive time loss
3Manufacturing precision
If conventional OPC processes are used, then the process flow is simple, but the manufacturing precision deteriorates due to image errors
Solution Approach 1:
The patent merges the conventional OPC process with an interaction-aware correction process by integrating contour extraction, zone identification, and secondary OPC application into the existing workflow. This merging approach improves manufacturing precision by accounting for pattern interactions while maintaining compatibility with standard process flows through systematic integration
Data Source
AI summary
The present disclosure provides a method of performing optical proximity correction (OPC). An integrated circuit (IC) design layout is received. The design layout contains a plurality of IC layout patterns. Two or more of the plurality of IC layout patterns are grouped together. The grouped IC layout patterns are dissected, or target points are set for the grouped IC layout patterns. Thereafter, an OPC process is performed based on the grouped IC layout patterns.