Transformer-Based OPC Layout Screening for MRC Violation Detection
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Solution Overview
Problem
Existing semiconductor manufacturing processes struggle to accurately detect Mask Rule Check (MRC) violations, which are crucial for ensuring the quality and integrity of semiconductor devices.
Innovation Solution
A method involving the extraction of coordinates from optical proximity corrected layout data and inputting these coordinates into a trained transformer model to determine the presence or absence of MRC violations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional MRC detection methods are used, then the manufacturing process is simple, but the detection accuracy of MRC violations is insufficient
Solution Approach 1:
The patent replaces traditional mechanical/optical MRC detection methods with an AI-based transformer model that processes layout data computationally. The transformer model takes tokenized layout information as input and outputs MRC violation detection results, substituting physical detection mechanisms with intelligent algorithms that achieve higher accuracy without requiring complex optical hardware.
Solution Approach 2:
The patent transforms the detection approach by changing from direct geometric measurement to AI-based pattern recognition. The layout data is converted into tokenized representations, and the transformer model learns optimal detection parameters through training on labeled data, enabling more accurate identification of MRC violations compared to fixed threshold methods.
2Productivity
If manual MRC checking is performed, then the detection process is simple, but the manufacturing efficiency is low
Solution Approach 1:
The patent replaces manual MRC checking with an automated transformer model that processes layout data rapidly. The model receives tokenized layout information and outputs detection results automatically, eliminating the time-consuming manual inspection process while maintaining high detection accuracy and enabling parallel processing of multiple layouts.
Solution Approach 2:
The patent introduces a tokenization intermediary layer that converts layout data into a format suitable for transformer model processing. This intermediate representation enables efficient computational processing while preserving the essential geometric information needed for MRC detection, bridging the gap between traditional layout data and AI-based analysis.
3Measurement precision
If comprehensive layout data is analyzed, then the detection accuracy is high, but the computational complexity increases
Solution Approach 1:
The patent extracts only the essential features from comprehensive layout data through tokenization, converting detailed geometric information into condensed token sequences. The transformer model then processes these extracted features to detect MRC violations, avoiding the need to analyze every detail of the original layout data and reducing computational energy consumption while maintaining detection accuracy.
Data Source
AI summary
A method for manufacturing a semiconductor device includes extracting coordinates of vertices of patterns from an optical proximity corrected layout data for an optical proximity corrected layout including the patterns; and inputting the coordinates of the vertices into a transformer model to output whether there is a Mask Rule Check (MRC) violation on the optical proximity corrected layout data.