Optical Proximity Correction for Semiconductor Logic Circuits

Solution Overview

Problem

Conventional semiconductor manufacturing methods face challenges in reducing processing time and manufacturing cost due to the high precision required for optical proximity correction (OPC) in both rule-based and model-based OPC techniques, especially in random logic circuits, which increases resource utilization and output data, making it difficult to efficiently manage processing time and cost.

Innovation Solution

The approach involves differentiating between high-precision and low-precision OPC areas within a semiconductor device's logic circuit, where high-precision processing is applied to critical areas and low-precision processing is applied to areas with less stringent accuracy requirements, using existing EDA tools to adjust settings and generate post-OPC layouts, thereby reducing processing time and manufacturing cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If high-precision OPC processing is applied to all areas of the semiconductor device, then manufacturing precision is improved, but processing time and manufacturing cost increase

Engineering Contradiction:

ImproveOPC correction accuracyVSAvoidprocessing time

Core Design Contradiction:

Manufacturing precisionVSLoss of time

Solution Approach 1:

The semiconductor device layout is divided into multiple areas with different precision requirements. The device is segmented into a first area requiring high-precision OPC and a second area requiring low-precision OPC, allowing differential processing strategies to be applied to different regions based on their specific needs

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different levels of OPC precision are applied to different regions of the semiconductor device. The first area receives high-precision correction while the second area receives low-precision correction, optimizing resource allocation by matching processing quality to local requirements rather than applying uniform high precision across the entire device

Inventive Principle:

Principle #3Local quality

2Manufacturing precision

If high-precision OPC processing is applied to all areas of the semiconductor device, then manufacturing precision is improved, but manufacturing cost increases

Engineering Contradiction:

ImproveOPC correction accuracyVSAvoidmanufacturing cost

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The semiconductor device layout is divided into multiple areas with different precision requirements. The device is segmented into a first area requiring high-precision OPC and a second area requiring low-precision OPC, allowing differential processing strategies to be applied to different regions based on their specific needs

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different levels of OPC precision are applied to different regions of the semiconductor device. The first area receives high-precision correction while the second area receives low-precision correction, optimizing resource allocation by matching processing quality to local requirements rather than applying uniform high precision across the entire device

Inventive Principle:

Principle #3Local quality

3Manufacturing precision

If model-based OPC is used instead of rule-based OPC, then correction accuracy is improved, but processing time increases significantly

Engineering Contradiction:

Improvecorrection accuracyVSAvoidprocessing time

Core Design Contradiction:

Manufacturing precisionVSLoss of time

Solution Approach 1:

Model-based OPC processing is applied partially only to the first area where high precision is required, rather than excessively applying it to the entire device. This selective application maintains necessary accuracy while avoiding the prohibitive processing time that would result from chip-level simulations across all areas

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS8719740B2Semiconductor device which is subjected to optical proximity correction

Publication Date: 2014.05.06 RENESAS ELECTRONICS CORP

AI summary

An object of the present invention is to reduce processing time and manufacturing cost for a semiconductor device including a logic circuit. To accomplish the above object, an area (114) for forming a logic circuit includes a first area (114b, 170) which is subjected to optical proximity correction with predetermined accuracy, and a second area (114a, 180) which is subjected to optical proximity correction with accuracy lower than said predetermined accuracy. Especially, the first area (114b, 170) includes a gate interconnection line (172) which acts as a transistor, and the second area (114a, 180) includes a dummy layout pattern (182) which does not act as a transistor.