Semiconductor OPC Design Data Orthogonal Wiring Angle Adjustment
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Solution Overview
Problem
As semiconductor devices miniaturize, it becomes challenging to maintain precision in OPC processing due to increased optical proximity effects, leading to difficulties in achieving the desired design pattern size and process margin, particularly with reduced k1 values, which affects the accuracy and reliability of mask pattern formation and defect inspection.
Innovation Solution
The method involves extracting design data where orthogonal wirings connect at angles other than 90 degrees, creating new design data that aligns with predetermined shape specifications, thereby enhancing the process margin and reducing the complexity of photolithography processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If model-based OPC processing is used to achieve high precision correction, then manufacturing precision is improved, but processing time increases significantly
Solution Approach 1:
The patent segments the OPC processing into two distinct stages: a preliminary stage that performs rough correction using simplified models, and a final stage that performs precise correction only on critical patterns. This segmentation divides the computationally intensive task into manageable portions, reducing overall processing time while maintaining manufacturing precision for critical features.
Solution Approach 2:
The patent applies partial action by performing full precision OPC processing only on selected critical patterns rather than all patterns. The preliminary stage handles all patterns with simplified processing, and only patterns requiring high precision undergo the computationally intensive final stage, thus reducing total processing time while maintaining necessary precision.
2Length of moving object
If k1 value is reduced to achieve smaller pattern sizes, then device miniaturization is enabled, but optical proximity effects are enhanced making correction more difficult
Solution Approach 1:
The patent applies preliminary action by performing preliminary OPC processing before final photolithography to pre-correct optical proximity effects. This preliminary correction stage prepares the mask patterns in advance, compensating for anticipated OPE so that the final pattern formation achieves the desired precision even with reduced k1 values.
Solution Approach 2:
The patent changes processing parameters by using different OPC algorithms for different processing stages. The preliminary stage uses simplified models with appropriate parameters for fast processing, while the final stage uses comprehensive models with parameters optimized for high precision, allowing the system to handle reduced k1 values effectively.
3Productivity
If conventional OPC methods are used with reduced k1 values, then processing speed is maintained, but dose margin becomes insufficient
Solution Approach 1:
The patent segments the correction process into preliminary and final stages, where the preliminary stage maintains processing speed through simplified models, and the final stage enhances reliability by applying precise corrections to critical patterns, thereby achieving both speed and adequate dose margin.
Solution Approach 2:
The patent applies partial action by performing enhanced precision processing only where necessary to ensure adequate dose margin, rather than applying full precision processing uniformly. This approach maintains overall processing speed while providing sufficient reliability for critical patterns.
Data Source
AI summary
A design data processing method in a semiconductor device includes extracting, from design data, a graphic in which there exist a first wiring and a second wiring which is orthogonal to the first wiring, and changing a portion where the first wiring is orthogonal to the second wiring to make connection at an angle other than 90 degrees, thereby preparing new design data.