Open-Block Read Bit-Line Voltage Reduction for Lower Icc
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Solution Overview
Problem
The peak and average current consumption during open block reads in semiconductor memory systems exceeds specified limits, leading to potential operation failures and increased power consumption.
Innovation Solution
Applying a lower than nominal bit line voltage and a lower read pass voltage, combined with a relaxed ramp rate, during open block reads to reduce peak and average current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If normal bit line voltage and read pass voltage are applied during open block reads, then read operation can be performed, but peak and average current consumption exceeds specified limits
Solution Approach 1:
The patent applies parameter changes by reducing the bit line voltage to a first level (lower than nominal) and the read pass voltage to a second level (lower than nominal) specifically during open block reads. This voltage parameter adjustment reduces the current consumption to within specified limits while maintaining reliable read operations, preventing operation failures due to excessive current draw.
2Measurement precision
If higher read pass voltage is applied to ensure proper reading, then reading reliability improves, but current consumption increases
Solution Approach 1:
The patent changes the voltage parameters dynamically based on the block state. For open blocks, it applies a reduced read pass voltage (second level) combined with a reduced bit line voltage (first level), achieving proper reading functionality while maintaining power consumption within acceptable limits, thus resolving the contradiction between read accuracy and power consumption.
Solution Approach 2:
The system dynamically adjusts voltage levels based on whether the block is open or closed. The memory controller determines the block state and applies different voltage combinations accordingly, making the voltage application dynamic rather than static. This allows optimization of both read accuracy and power consumption for different operational states.
Data Source
AI summary
Technology for a storage system that reduces the Icc during open block reads. A lower than nominal voltage may be applied to the bit lines during open block reads, which reduces Icc. A nominal bit line voltage may be used during closed block reads. The lower than nominal bit line voltage may be combined with using a lower than nominal read pass voltage (Vread) to unprogrammed word lines during the open block read. The lower than nominal Vread has a lower magnitude than a nominal Vread used during a closed block read. Combining the lower than nominal bit line voltage with the lower than nominal Vread to unprogrammed word lines further reduces Icc during open block reads. The ramp rate of Vread may be relaxed (made slower) during at least some open block reads in combination with the lower than nominal bit line voltage.