Open-Drain Output Circuit for Floating-Gate Waveform Stability

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Solution Overview

Problem

In serial communication systems using open-drain type output circuits, the power supply turning off can cause the gate terminal of transistors to be in a floating state, leading to unintended activation and changes in signal waveforms due to AC coupling through waveform shaping capacitors.

Innovation Solution

An output circuit design that includes a pull-down circuit to maintain the transistor in an inactivated state when the gate terminal is floating, using additional transistors and capacitors to control the gate voltage and prevent unintended activation, ensuring stable signal waveforms even when the power supply is off.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the power supply is turned off to save energy, then energy consumption is reduced, but the gate terminal becomes floating causing unintended transistor activation

Engineering Contradiction:
Improvepower consumptionVSAvoidsignal waveform stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by providing a predetermined voltage (ground potential) to the gate terminal before the power supply is turned off. This is achieved through a pull-down resistor connected between the gate terminal and ground, which ensures the transistor remains in the cutoff state even when the power supply voltage is removed. The pull-down resistor pre-establishes the gate voltage at a safe level to prevent floating state and unintended activation.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a pull-down resistor is added to prevent floating gate state, then signal waveform stability is improved, but device complexity increases

Engineering Contradiction:
Improvesignal waveform stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by making the pull-down resistor serve multiple functions: (1) preventing the gate terminal from floating when power is off, (2) ensuring the transistor remains in cutoff state during normal operation, and (3) working in conjunction with the waveform shaping capacitor to maintain signal integrity. This multi-functional design achieves reliable waveform stability without requiring additional complex circuitry.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses undesired changes in signal waveforms, maintaining the transistor in an inactive state and ensuring reliable communication by controlling the gate voltage, thus preventing unintended activation and maintaining signal integrity.

Implementation Method 1

the gate terminal of the transistor T1 is AC coupled with the transmission path 14 through the waveform shaping capacitor C1

Methodology Applied
Scientific EffectAC coupling: Capacitance

Data Source

PatentUS8487649B2Output circuit, system including output circuit, and method of controlling output circuit
Publication Date: 2013.07.16 SOCIONEXT INC
  • US8487649B2 patent drawing
  • US8487649B2 patent drawing
  • US8487649B2 patent drawing

AI summary

An output circuit includes a first transistor coupled to an external terminal and including a gate terminal that receives a first drive signal. The first transistor drives a potential at the external terminal in accordance with the first drive signal. A first capacitor includes a first end coupled to the gate terminal of the first transistor and a second end coupled to the external terminal. The output circuit also includes a circuit portion coupled to the first transistor. The circuit portion maintains the first transistor in an inactivated state when the gate terminal of the first transistor is in a floating state.