Open-Gate PC-HEMT for Normally-Off Operation
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Solution Overview
Problem
Existing high-electron-mobility transistors (HEMTs) based on III-V semiconductor materials face challenges in achieving 'normally-off' operation mode while maintaining high device turn-on performance, leading to increased power consumption and circuit complexity.
Innovation Solution
The development of an open-gate pseudo-conductive high-electron mobility transistor (PC-HEMT) with a multilayer hetero-junction structure, featuring a specific thickness and surface roughness of the top layer in the open gate area, allowing for capacitive coupling and enabling a pseudo-conducting current range between normally-on and normally-off operation modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional HEMT structures with negative threshold voltage are used, then normally-on operation mode is achieved, but power consumption increases and circuit complexity increases
Solution Approach 1:
The patent applies parameter changes by precisely controlling the thickness of the AlGaN barrier layer (5-9 nm) and the surface roughness (0.2 nm or less) to transform the transistor from normally-on to normally-off operation mode. This parameter optimization enables the device to operate without requiring negative gate voltage, thereby reducing power consumption while maintaining ease of operation.
Solution Approach 2:
The patent implements local quality by creating a specific surface roughness profile (0.2 nm or less) in the open gate area and controlling the barrier layer thickness locally. This localized structural optimization enables pseudo-conductive behavior that achieves normally-off operation without affecting the overall device structure, thus reducing power consumption while maintaining operational simplicity.
2Ease of operation
If conventional HEMT structures with negative threshold voltage are used, then normally-on operation mode is achieved, but drive circuit complexity increases
Solution Approach 1:
By optimizing the barrier layer thickness (5-9 nm) and surface roughness (0.2 nm or less), the patent achieves normally-off operation mode that eliminates the need for complex negative voltage generation circuits. This parameter control simplifies the drive circuitry while maintaining ease of operation.
Solution Approach 2:
The patent inverts the conventional approach by designing the HEMT to be normally-off rather than normally-on. This inversion eliminates the need for active biasing circuits and negative voltage generators, thereby reducing drive circuit complexity while preserving operational ease.
3Ease of manufacture
If the top layer thickness is not optimized, then manufacturing is simpler, but sensitivity is reduced
Solution Approach 1:
The patent establishes specific parameter ranges for the top layer thickness (5-9 nm) and surface roughness (0.2 nm or less) that optimize both manufacturability and sensitivity. These parameter specifications enable standard semiconductor fabrication processes to achieve the required precision while maximizing device sensitivity for high-voltage and high-power sensing applications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces power consumption, simplifies drive circuits, and enhances sensitivity, enabling efficient operation and ultrasensitive sensing capabilities in high-voltage and high-power applications.
Implementation Method 1
a conducting channel comprising a two-dimensional electron gas (2DEG), formed at the interface between said buffer layer and said barrier layer and providing electron current in said transistor between source and drain electrodes
Implementation Method 2
an open gate area between said source and drain contacts; wherein: (i) the thickness of a top layer (barrier or buffer) of said structure in said open gate area is 5-9 nm which corresponds to the pseudo-conducting current range between normally-on and normally-off operation mode of the transistor
Data Source
AI summary
In some embodiments, an open-gate pseudo-conductive high-electron mobility transistor (PC-HEMT) includes a multilayer hetero-junction structure made of III-V single-crystalline or polycrystalline semiconductor materials. This structure includes at least one buffer layer and a barrier layer, and is deposited on a substrate layer. The PC-HEMT further includes a two-dimensional electron gas (2DEG) or two-dimensional hole gas (2DHG) conducting channel formed at the interface between the buffer layer and the barrier layer, source and drain contacts, either ohmic or non-ohmic, connected to the 2DEG or 2DHG conducting channel, electrical metallizations for connecting the PC-HEMT to an electric circuit, and an open gate area between the source and drain contacts. Some embodiments use non-ohmic contacts, have thickness of the top (buffer or barrier) layer in the open gate area in the range of 5-9 nm, which corresponds to the pseudo-conducting current range between normally-on and normally-off operation mode of the transistor, and have the roughness of the surface barrier layer in the range of about 0.2 nm or less.