Open-Loop Sensor Readout Circuit for Low-Noise CMOS Imaging
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Solution Overview
Problem
Current CMOS image sensors face challenges in achieving low-noise, high-sensitivity, and high-dynamic-range performance due to high capacitance requirements for low-pass filtering, which increases device cost and silicon area, and existing architectures suffer from thermal noise and limited voltage amplification.
Innovation Solution
The implementation of a signal-readout circuit with an open-loop amplifier and correlated multiple sampling technique, which reduces thermal noise by limiting bandwidth and using negative feedback to achieve low-noise readout without additional filtering capacitance, and allows for voltage amplification and increased dynamic range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If high values of capacitances are used for low-pass filtering to reduce readout noise, then readout noise is reduced, but silicon area and device cost increase
Solution Approach 1:
The patent extracts the low-pass filtering function from a dedicated hardware filter circuit and implements it through the temporal sampling process. By taking successive samples at different times and processing them digitally, the filtering function is achieved without requiring large physical capacitance values, thus reducing silicon area while maintaining noise reduction performance
Solution Approach 2:
The patent replaces the traditional electrical hardware low-pass filter (which requires large physical capacitances) with a digital signal processing approach using correlated double sampling. This substitution eliminates the need for large analog filtering components, significantly reducing the silicon area required while achieving the same noise reduction effect
2Object-affected harmful factors
If high values of capacitances are used for low-pass filtering to reduce readout noise, then readout noise is reduced, but device cost increases
Solution Approach 1:
The patent extracts the low-pass filtering function from a dedicated hardware filter circuit and implements it through the temporal sampling process. By taking successive samples at different times and processing them digitally, the filtering function is achieved without requiring large physical capacitance values, thus reducing silicon area and device cost while maintaining noise reduction performance
Solution Approach 2:
The patent replaces the traditional electrical hardware low-pass filter (which requires large physical capacitances and increases manufacturing cost) with a digital signal processing approach using correlated double sampling. This substitution eliminates the need for large analog filtering components, significantly reducing device cost while achieving the same noise reduction effect
3Power
If conventional amplifier architectures are used, then voltage amplification is provided, but thermal noise and limited dynamic range persist
Solution Approach 1:
The patent applies preliminary action by performing correlated double sampling before final signal processing. By taking multiple samples at different times (including pre-trigger and post-trigger samples) and processing them to cancel thermal noise components, the system achieves noise reduction while preserving the necessary voltage amplification, thereby improving the signal-to-noise ratio and dynamic range
Solution Approach 2:
The patent implements a form of feedback through the correlated double sampling process, where previously taken samples are used to cancel noise components in subsequent samples. This feedback mechanism allows the system to maintain voltage amplification while continuously reducing thermal noise, thereby extending the effective dynamic range of the sensor
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in very low overall electronic noise with reduced semiconductor die area, enabling competitive package size and manufacturing cost while maintaining high sensitivity and dynamic range.
Implementation Method 1
using negative feedback to achieve low-noise readout without additional filtering capacitance
Data Source
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AI summary
The present invention discloses a solid-state electric charge sensor (200, 600) comprising at least one signal-readout circuit (205, 605) that comprises a current source (140, 640) and a column line (120, 620). The sensor also comprises at least one charge detector circuit (210, 610) that is operatively coupled with the at least one signal-readout circuit (205, 605). The at least one signal-readout circuit (205, 605) is characterized by further comprising at least one open-loop amplifier (250, 650), the input of which is operatively connectable with the at least one column signal line (220, 620) and with the at least one current source (240, 640); at least one feedback line (230, 630) that is operatively connectable with the output (254, 654) of the at least one open-loop amplifier (250, 650); and operative to selectively form a negative feedback loop; and wherein the open-loop amplifier (250, 650) has an inverting voltage gain.