Open-Loop TDC Architecture to Eliminate Near-Zero Dead Zone
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Solution Overview
Problem
Time-to-digital converters (TDCs), particularly flash TDCs, face a dead zone limitation where time differences approaching zero cannot be determined due to non-zero response times of logic gates, leading to inaccurate phase or time measurements.
Innovation Solution
The use of multiple TDCs with a common open-loop sample clock to independently digitize and process signal events, forming a difference in the digital domain to achieve sub-gate delay resolution and overcome the dead zone, while allowing for improved accuracy and power efficiency by leveraging oversampling and digital filtering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single flash TDC is used to measure time differences, then the measurement speed is fast, but the measurement precision deteriorates when the time difference approaches zero due to the dead zone caused by non-zero logic gate response times
Solution Approach 1:
The invention divides a single TDC measurement task into multiple TDC measurements. Specifically, one TDC measures the time difference between the first event and a reference clock edge, while another TDC measures the time difference between the second event and the same reference clock edge. The final time difference is obtained by digitally subtracting these two measurements, thereby avoiding the dead zone problem of a single TDC.
Solution Approach 2:
The invention introduces a reference clock edge as an intermediary measurement point. Instead of directly measuring the time difference between two events with a single TDC, the reference clock edge serves as a common reference for both measurements, enabling the system to overcome the dead zone limitation through differential measurement in the digital domain.
2Measurement precision
If multiple TDCs are used to overcome the dead zone, then the measurement precision improves, but the device complexity and chip area increase
Solution Approach 1:
The invention replaces the need for a single complex high-resolution TDC with multiple simpler TDCs whose measurements are processed in the digital domain. The analog/digital conversion complexity is distributed across multiple components, and the final high-precision result is achieved through digital signal processing, thereby reducing the complexity burden on each individual TDC component.
3Measurement precision
If higher resolution TDCs are used to achieve sub-picosecond accuracy, then the measurement precision improves, but the power consumption increases
Solution Approach 1:
The invention segments the high-precision measurement task across multiple TDCs with moderate resolution. Each TDC operates at lower power consumption individually, and the cumulative precision is achieved through digital processing of multiple measurements rather than relying on a single high-power high-resolution TDC.
Data Source
AI summary
A time-to-digital converter (TDC) detects a timing relationship between signals representing two temporal events. Several samples are acquired over a certain time period for each event, and the signals related to the different events are digitized or quantized either by separate TDCs or by a single TDC in a time-sequential manner. The quantized results are then processed, for example added to/subtracted from one another, and used to determine the phase or time difference between the two events. When information being quantized is quasi-static over time periods where the measurement is performed, the instantaneous or “one shot” accuracy of a TDC need not be as good as or better than the desired time resolution. Digitally processing the signals and averaging the results moves an otherwise difficult analog quantizer problem to the digital domain where savings in power and chip area can be easily achieved without sacrificing accuracy.