Open Superblock Read Trim Selection for Partially Written Pages
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Solution Overview
Problem
Existing memory systems face challenges in efficiently handling partially written superblocks, leading to increased uncorrectable bit error rates and complexity in system controllers due to cell-to-cell interference and inadequate read trim set management.
Innovation Solution
A memory device is configured to maintain internal status of open superblocks, including a page indicator for the last written page, allowing it to determine the appropriate read trim set for partially written superblocks based on page map information and last written page status, thereby reducing errors and controller complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional read operations are used on partially written superblocks, then read operations can be performed, but uncorrectable bit error rates increase due to cell-to-cell interference
Solution Approach 1:
The patent applies local quality by implementing different read trim sets for different regions within a superblock. Specifically, pages that are fully written use one read trim set, while pages that are partially written use a different read trim set. This localized differentiation allows the system to optimize read operations for each specific region's condition, reducing bit error rates caused by cell-to-cell interference in partially written areas while maintaining efficient reads in fully written areas.
2Reliability
If the controller tracks and manages read trim sets for all superblocks, then read accuracy improves, but controller complexity increases
Solution Approach 1:
The patent implements self-service by enabling the memory device itself to automatically determine and apply the appropriate read trim set based on its internal knowledge of which superblocks are partially written. The memory device maintains metadata about the write status of each superblock and uses this information to select the correct read trim set without requiring external controller intervention. This transfers the management burden from the controller to the memory device, reducing controller complexity while maintaining read accuracy.
3Reliability
If different read trim sets are used for partially written superblocks, then bit error rates reduce, but the system requires more complex read trim set management
Solution Approach 1:
The patent applies preliminary action by pre-establishing multiple read trim sets with different parameters before read operations are needed. The system prepares at least two distinct read trim sets: one optimized for fully written pages and another optimized for partially written pages. This preliminary preparation allows the system to quickly select the appropriate trim set based on the superblock's write status without requiring complex real-time calculations or adjustments during the read operation, thereby simplifying the overall management complexity.
Data Source
AI summary
The present disclosure relates to partially written superblock treatment. An example apparatus includes a memory device operable as a multiplane memory resource including blocks organized as superblocks. The memory device is configured to maintain, internal to the memory device, included in a status of an open superblock, a page indicator corresponding to a last written page of the open superblock. The memory device is further configured, responsive to receipt, from a controller, of a read request to a page of the open superblock, determine from page map information maintained internal to the memory device and from the indicator of the last written page, which of a number of different read trim sets to use to read the page of the open superblock corresponding to the read request.