Operation Circuit Dynamic Channel Allocation Zero Matrix

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Solution Overview

Problem

Conventional technologies face inefficiencies in arithmetic operation speed during convolution processing in neural networks due to zero matrix weight coefficients, leading to wasted processing time and reduced throughput in hardware implementations.

Innovation Solution

An operation circuit with multiple sub-operation circuits processes convolution operations, where zero matrix channels skip unnecessary calculations and output results directly, optimizing processing by allocating MAC units efficiently across kernel data sets based on sparsity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If parallel MAC operation units are prepared for each output channel, then throughput is improved, but processing time is wasted when kernel data is zero matrix

Engineering Contradiction:
ImprovethroughputVSAvoidprocessing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements dynamic channel allocation where MAC operation units are assigned to different output channels based on real-time detection of zero matrix kernel data. Instead of static one-to-one mapping, the system dynamically reconfigures which MAC unit processes which channel, allowing skipped channels to be reassigned to other units, thus eliminating idle time while maintaining parallel processing capability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent introduces a skip mechanism that detects zero matrix kernel data and bypasses unnecessary MAC operations for those channels. When a zero matrix is detected, the corresponding MAC operation is skipped entirely, and the processing time is reclaimed by having other MAC units process additional channels, effectively rushing through the computation by eliminating wasted operations

Inventive Principle:
Principle #21Skipping (Rushing through)

2Device complexity

If MAC operation units are allocated one-to-one with output channels, then circuit configuration is simple, but arithmetic operation speed decreases due to idle units

Engineering Contradiction:
Improvecircuit configurationVSAvoidarithmetic operation speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent makes MAC operation units universal by enabling them to process multiple output channels throughout the computation. Instead of dedicating each MAC unit to a single fixed channel, any MAC unit can be assigned to process any output channel depending on which channels have non-zero kernel data, thus maximizing utilization of the same hardware resources without increasing circuit complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements dynamic channel allocation where MAC operation units are assigned to different output channels based on real-time detection of zero matrix kernel data. Instead of static one-to-one mapping, the system dynamically reconfigures which MAC unit processes which channel, allowing skipped channels to be reassigned to other units, thus eliminating idle time while maintaining parallel processing capability

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20240054181A1Operation circuit, operation method, and program
Publication Date: 2024.02.15 NT T INC
  • US20240054181A1 patent drawing
  • US20240054181A1 patent drawing
  • US20240054181A1 patent drawing

AI summary

One aspect of the present invention is an operation circuit for performing a convolution operation of input feature map information supplied as a plurality of channels and coefficient information supplied as a plurality of channels, the operation circuit including a set including at least two channels of an output feature map based on output channels and at least three sub-operation circuits, wherein at least two sub-operation circuits are allocated for each set, the sub-operation circuits included in the set execute processing of a convolution operation of the coefficient information and the input feature map information included in the set, when a specific channel of the output feature map is a zero matrix, a sub-operation circuit that performs a convolution operation of the zero matrix executes processing of a convolution operation of the coefficient information and the input feature map information to be supplied next from a channel of the output feature map and a channel of the input feature map included in the set, and a result of the convolution operation is output for each channel of the output feature map.