Operation Processing Apparatus for Dynamic Fixed-Point Precision
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Solution Overview
Problem
Deep learning processes face challenges with precision due to the use of fixed-point numbers, which can lead to decreased bit width, resulting in increased recognition error rates and prolonged learning times, as they struggle to maintain accurate calculations across multiple layers and iterations.
Innovation Solution
An operation processing apparatus that acquires statistical information on the distribution of bits in fixed-point data, allowing for dynamic adjustment of the decimal point position based on overflow rates, thereby optimizing the precision of calculations and reducing the impact of bit width limitations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If fixed-point numbers are used for deep learning calculations, then power efficiency is improved and chip area is reduced, but calculation precision deteriorates and recognition error rates increase
Solution Approach 1:
The patent implements dynamic fixed-point processing by automatically adjusting the decimal point position during deep learning operations. The system determines the actual decimal point position based on the distribution of calculation results, enabling the fixed-point system to adapt its precision dynamically rather than being static. This resolves the contradiction by maintaining high precision where needed while preserving the power efficiency and compactness of fixed-point arithmetic.
Solution Approach 2:
The patent changes the parameter of decimal point position dynamically during calculations. By adjusting the decimal point position based on the statistical distribution of intermediate results, the system optimizes precision for each calculation stage. This allows the fixed-point system to achieve variable precision comparable to floating-point operations while maintaining the hardware efficiency of fixed-point arithmetic.
2Productivity
If bit width is decreased to reduce data amount, then processing speed is improved, but calculation precision deteriorates and learning time increases
Solution Approach 1:
The system dynamically adjusts the effective precision by changing decimal point position during calculations rather than using a fixed bit width allocation. This allows the system to achieve higher effective precision when needed without permanently increasing the data width, thus maintaining processing speed while improving calculation accuracy for critical operations.
Solution Approach 2:
The patent performs preliminary analysis of the data distribution to determine the optimal decimal point position before executing calculations. By pre-determining the appropriate precision level based on the characteristics of the input data and intermediate results, the system avoids unnecessary precision calculations while ensuring adequate precision is maintained where required.
3Device complexity
If fixed-point arithmetic is used instead of floating-point, then device complexity is reduced, but recognition accuracy decreases
Solution Approach 1:
The system implements self-adjusting fixed-point arithmetic where the decimal point position is automatically determined based on the distribution of calculation results. The apparatus autonomously analyzes intermediate results and adjusts precision parameters without requiring complex external control mechanisms, thus maintaining low device complexity while improving recognition accuracy through adaptive precision management.
Solution Approach 2:
The patent incorporates feedback mechanisms where the system monitors the distribution of fixed-point calculation results and uses this information to adjust the decimal point position for subsequent operations. This feedback loop enables the system to maintain high recognition accuracy by adapting precision to the actual data characteristics while preserving the simplicity of fixed-point hardware architecture.
Data Source
AI summary
An operation processing apparatus includes a memory and a processor coupled to the memory. The processor executes an operation according to an operation instruction, acquires statistical information for a distribution of bits in fixed point data after an execution of an operation for the fixed point data according to an acquisition instruction, and outputs the statistical information to a register designated by the acquisition instruction.


