Opposed-Lead MOSFET Packaging to Cut On-Resistance
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Solution Overview
Problem
The challenge is to reduce the surface area of semiconductor elements in power semiconductor devices while minimizing the increase in on-resistance, as conventional designs face issues with reduced surface area leading to increased on-resistance in MOSFETs.
Innovation Solution
The semiconductor device design includes a first and second semiconductor element with electrodes arranged on opposite surfaces, bonded to leads with insulating layers, allowing for a larger surface area for each element by mounting them on opposite surfaces of the leads, forming a common drain circuit with shared drain electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the surface area of semiconductor elements is reduced to decrease device size, then the device can be mounted in a smaller area, but the on-resistance of MOSFETs increases
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement where multiple semiconductor elements are mounted side-by-side on the same surface to a three-dimensional configuration where elements are mounted on opposite surfaces of a lead frame. This dimensional change allows each element to maintain a larger effective surface area while the overall device footprint is reduced, thereby decreasing on-resistance without increasing device size.
2Area of stationary object
If multiple semiconductor elements are arranged side by side on the same surface, then the device surface area increases, but each element can maintain adequate surface area
Solution Approach 1:
The invention utilizes the third dimension by mounting semiconductor elements on opposite surfaces of the lead frame rather than arranging them side-by-side on a single surface. This approach effectively doubles the available mounting area within the same device footprint, allowing each element to maintain adequate surface area while the overall device area remains compact.
Data Source
AI summary
The semiconductor device includes first and second semiconductor elements. Each element has an obverse surface and a reverse surface, with a first electrode arranged on the reverse surface, and with a second electrode arranged on the obverse surface. The semiconductor device further includes: a first lead having an obverse surface and a reverse surface; an insulating layer covering the first lead, the first semiconductor element and the second semiconductor element; a first electrode connected to the second electrode of the first semiconductor element; and a second electrode connected to the first lead. The first semiconductor element and the first lead are bonded to each other with the reverse surface of the first semiconductor element facing the lead obverse surface. The second semiconductor element and the first lead are bonded to each other with the reverse surface of the second semiconductor element facing the lead reverse surface.