Opposite-Side Capacitor Package Layout for Thinner 5G Die Stacks
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Solution Overview
Problem
In 5G communication systems, the placement of capacitors relative to dies in package devices is challenging due to the need for a gap between components, leading to performance degradation and increased package thickness, especially in ultra-high frequency bands where precise alignment and reduced layer counts are crucial.
Innovation Solution
A package device design that positions a capacitor on the opposite side of a die relative to a substrate, using a configuration with upper and lower solder balls to efficiently connect the power bump, allowing the capacitor to be placed near the die while minimizing interference with the motherboard and reducing the number of layers, thereby decreasing the package thickness and power impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a capacitor is disposed near the die to improve performance, then capacitor performance is improved, but a gap must be required between components which increases package thickness
Solution Approach 1:
The capacitor is moved from a planar arrangement to a three-dimensional arrangement by placing it on the opposite side of the die relative to the substrate. This vertical stacking approach allows the capacitor to be positioned close to the die in the Z-direction while maintaining adequate spacing, thereby improving capacitor performance without increasing package thickness in the X-Y plane.
Solution Approach 2:
The package structure implements a nested arrangement where the capacitor is positioned within the vertical space above or below the die, utilizing the Z-direction space that would otherwise be unused. This allows compact integration of multiple components in a stacked configuration, reducing overall package footprint and thickness while maintaining component performance.
2Ease of manufacture
If a gap is required between die and capacitor components, then manufacturing is simplified, but the distance between power bump of die and capacitor increases which degrades capacitor performance
Solution Approach 1:
By transitioning from a lateral gap arrangement to a vertical stacking arrangement, the invention allows the capacitor to be positioned in close proximity to the power bump in the Z-direction. This maintains strong electrical connection and minimizes inductance while still providing adequate manufacturing clearance through the vertical dimension rather than lateral spacing.
3Ease of manufacture
If two or more types of power use different layers, then power distribution is organized, but the number of layers increases which increases total package thickness
Solution Approach 1:
The substrate layers are designed to serve multiple functions simultaneously. The same substrate layers that provide mechanical support and electrical connection also serve as power distribution paths for multiple power types. This multi-functional design eliminates the need for additional dedicated power layers, thereby organizing power distribution while maintaining a compact layer count and reduced package thickness.
Data Source
AI summary
A package device is provided. The package device includes a substrate, a plurality of upper lands disposed on one surface of the substrate, a plurality of upper solder balls disposed on the plurality of upper lands, a die connected to the plurality of upper solder balls, a plurality of lower lands disposed on the other surface of the substrate, a plurality of lower solder balls disposed on some of the plurality of lower lands, and a capacitor connected to the lower lands on which the plurality of lower solder balls are not disposed among the plurality of lower lands, provided on an opposite side of the die, and including a height greater than the height of the plurality of lower solder balls.