Optically Switched Breaker Circuit Without Control MOSFET Limits
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Solution Overview
Problem
Existing high-voltage switching circuits using cascaded JFETs face limitations due to the need for a control MOSFET, which introduces voltage rating constraints, thermal stresses, and potential reliability issues from gate oxide degradation.
Innovation Solution
A new switch topology that operates cascaded JFET configurations without a control MOSFET, utilizing a voltage-balancing network with distinct parallel paths to distribute leakage currents evenly and reduce power loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a control MOSFET is added to control cascaded JFETs, then the circuit achieves normally-OFF behavior and improved safety, but the voltage rating is limited and thermal stresses increase
Solution Approach 1:
The patent removes the control MOSFET from the circuit configuration. Instead of using a MOSFET to control the JFETs, the invention uses direct gate control of the JFETs through a resistor network, eliminating the intermediate control device and its associated voltage rating limitations and thermal stress issues.
Solution Approach 2:
The resistor network in the patent serves multiple functions: it provides gate control voltage division, establishes bias conditions, and enables normally-OFF operation without requiring a separate MOSFET control device. This multi-functional approach eliminates the need for the additional control component.
2Ease of operation
If a control MOSFET is used in the super cascode configuration, then the circuit can be controlled, but localized thermal stresses occur and gate oxide degradation may happen
Solution Approach 1:
The patent extracts and removes the MOSFET control device from the super cascode configuration. The JFETs are controlled directly through their gate terminals using a resistor network, eliminating the thermal stress and gate oxide degradation issues associated with MOSFET operation in this high-power configuration.
Solution Approach 2:
The JFETs control themselves through the resistor network that provides gate voltage division. The same resistor network that establishes bias also provides the control mechanism, eliminating the need for a separate control MOSFET that would be subject to thermal stress.
3Temperature
If cascaded JFETs are used without a control MOSFET, then thermal management is improved and low ON-resistance benefits are realized, but active negative gate voltage control is required
Solution Approach 1:
The patent removes the control MOSFET that would complicate the thermal management. By directly controlling the JFET gates through the resistor network, the configuration achieves better thermal performance while maintaining full control capability through negative gate voltage application.
Solution Approach 2:
The resistor network automatically provides the necessary gate voltage division and control. The system self-regulates by distributing the control voltage across the cascaded JFETs through the resistor network, eliminating the need for additional control electronics while maintaining ease of operation.
Data Source
AI summary
A disclosed switching apparatus, such as a circuit breaker, includes a transistor switch circuit connected between a power input terminal and a load terminal, and, connected to the power input terminal and bypassing the transistor switch circuit, a switchable bypass leg that is optically switched by a series-connected photoconductive semiconductor switch (PCSS). The transistor switch circuit includes at least one cascade of three or more series-connected transistors, and at least one resistor network configured to divide a voltage from a voltage source across a cascade of series-connected transistors. Operating the switch apparatus includes detecting whether a sensed electric current is in a fault condition, opening the transistor switch circuit upon detecting a fault condition, and then closing the PCSS so that the electric current is diverted onto a switchable bypass path. The opening of the transistor switch circuit comprises turning OFF a normally-ON transistor switch circuit.