Optical Burst Switching Network Assembling System

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Solution Overview

Problem

Current optical burst switching (OBS) networks face inefficiencies in quickly classifying and assembling service data packets, buffering large volumes, and accurately sending bursts due to limitations in network processor control and hardware real-time performance, leading to congestion and insufficient adaptability.

Innovation Solution

A burst sending system and method that includes a service data packet receiving and information extraction module, a burst generation and information maintenance module, an SDRAM controller, a burst buffer, and an accurate timer, which enables high-speed burst assembling, mass data buffering, and accurate periodic burst sending by optimizing SDRAM usage and maintaining FEC status and parameter tables.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If network processor is used to assemble and send bursts in OBS network, then the OBS mechanism can be realized, but the processing efficiency is low and congestion occurs during burst sending

Engineering Contradiction:
Improveburst assembling efficiencyVSAvoidburst sending time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides the burst sending system into multiple functional modules: a burst assembling module that assembles IP packets into bursts, a burst sending module that manages the sending process, and a burst buffer that stores bursts. This segmentation allows parallel processing and eliminates the bottleneck of sequential network processor operations, thereby improving assembling efficiency and reducing sending time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a burst buffer that pre-stores assembled bursts before they are sent. This preliminary action allows the sending module to retrieve bursts without waiting for assembly completion, enabling overlapping of assembly and sending operations. The offset time mechanism also performs preliminary resource reservation before actual burst transmission, further reducing sending delays.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If conventional circuit switching mechanism is used, then the protocol is simple and technology is mature, but channel utilization rate is reduced when connection duration is short

Engineering Contradiction:
Improveprotocol simplicityVSAvoidchannel utilization rate
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent implements dynamic burst assembly that adapts to varying traffic conditions. The system dynamically adjusts assembly parameters such as burst size, assembly time, and sending schedule based on real-time network state and traffic characteristics. This dynamic behavior allows the system to maintain simple protocol operations while achieving high channel utilization by optimizing resource allocation for short-lived connections.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes key parameters of the switching mechanism from static (circuit switching) to dynamic (burst switching). Specifically, it introduces variable burst assembly sizes, adjustable offset times, and flexible scheduling intervals that can be modified based on traffic patterns. These parameter changes enable the system to achieve high utilization for short connections while maintaining operational simplicity through standardized procedures.

Inventive Principle:
Principle #35Parameter changes

3Speed

If high-speed SRAM is used for buffering, then burst sending speed can be improved, but the cost increases

Engineering Contradiction:
Improveburst sending speedVSAvoidsystem cost
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The patent employs SDRAM, a cost-effective memory technology, instead of expensive SRAM for burst buffering. The system compensates for SDRAM's relatively lower speed through architectural optimizations including parallel access paths, pre-fetching mechanisms, and intelligent buffer management. This approach achieves adequate burst sending speed while significantly reducing system cost compared to SRAM-based solutions.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent introduces a burst buffer as an intermediary between the burst assembling module and the sending module. This buffer acts as a mediator that decouples the assembly and sending processes, allowing them to operate independently at optimal speeds. The buffer management module coordinates data transfer between SDRAM and the optical layer, optimizing throughput without requiring high-speed SRAM, thereby achieving cost-effective performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP2040399B1An optical burst switching network based burst packet transmitting system and the method thereof
Publication Date: 2012.11.14 HUAWEI TECH CO LTD
  • EP2040399B1 patent drawingFigure 1~2
  • EP2040399B1 patent drawingFigure 3~4
  • EP2040399B1 patent drawingFigure 5

AI summary

System sending burst based on an optical burst switching network includes a service data packet receiving and information extracting module, a burst generation and information maintenance module, a storage unit controller, a burst buffer and a burst-to-be-sent information receiving and processing module. Method sending burst based on an optical burst switching network includes writing service data and description information to a buffer; assembling the service data to a burst, and storing the burst to a storage unit; sending the description information of the burst to a scheduling chip; reading a burst-to-be-sent from the storage unit to the burst buffer; converting the burst to an optical burst data packet, and sending the optical burst data packet to a destination address. The data and the description information are respectively stored in embodiments of the invention, thus avoiding multiple transferring and operation of the data, and thereby improving the assembling efficiency.