Integrated Optical Structure for ESD-Robust Butt-Joint Coupling
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Solution Overview
Problem
As the transmission rate in optical communication increases, semiconductor optical devices require quicker response times, which is achieved by reducing the area between electrodes. However, this reduction in device size leads to a decrease in withstand voltage against electrostatic discharge (ESD), resulting in reduced reliability.
Innovation Solution
The semiconductor integrated optical device incorporates a protrusion portion of the first conductivity type between the first and second core layers, joined by a butt joint, and positions the voltage applying end away from the butt joint region to reduce electric field concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the area between electrodes is reduced to improve response time, then quick response is achieved, but withstand voltage against ESD decreases
Solution Approach 1:
A protrusion portion of first conductivity type is introduced as an intermediary element between the core layers and the electrode. This protrusion portion acts as a mediator that separates the electrode from the core layers, allowing the electrode to be positioned closer to the core layers (improving response time) while the protrusion portion maintains the electric field distribution and withstand voltage characteristics (maintaining reliability).
Solution Approach 2:
The electrode is positioned in a different spatial dimension relative to the core layers by utilizing the protrusion portion. Instead of directly reducing the planar distance between electrode and core layers, the invention uses the vertical dimension (height of protrusion portion) to achieve proximity while maintaining electrical isolation and field distribution characteristics.
2Ease of manufacture
If the device size is reduced to lower price, then cost reduction is achieved, but withstand voltage against ESD decreases
Solution Approach 1:
The invention changes the geometric parameters of the device structure by introducing a protrusion portion with specific height and width dimensions. This parameter change allows the device to maintain smaller overall size (reducing price) while the protrusion portion's dimensions are optimized to maintain adequate withstand voltage characteristics.
3Area of stationary object
If the voltage applying end is positioned close to the BJ joint region to reduce device area, then device size is reduced, but electric field concentration increases
Solution Approach 1:
The protrusion portion serves as an intermediary structure between the voltage applying end and the BJ joint region. It allows the voltage applying end to be positioned close to the BJ joint region (reducing device area) while the protrusion portion's geometry distributes the electric field, preventing excessive concentration at the BJ joint region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability of the semiconductor integrated optical device by improving its withstand voltage against ESD while maintaining optimal optical coupling and device characteristics.
Implementation Method 1
a part of a substrate forms a side-wall shape control layer between the two semiconductor multilayer structures through a mass transport phenomenon
Implementation Method 2
forming the side-wall shape control layer and thus reducing occurrence of crystal defects of the semiconductor multilayer structures
Data Source
AI summary
Provided is a semiconductor integrated optical device with high reliability. The semiconductor integrated optical device includes first and second core layers, a semiconductor layer, a first electrode, and a protrusion portion. The semiconductor integrated optical device includes, in plan view, a BJ joint region in which the protrusion portion is formed, a first optical function device region which is adjacent to the BJ joint region in a predetermined direction and in which the first core layer and the first electrode are located, and a second optical function device region in which the second core layer is located. The first electrode includes a voltage applying end at an end portion on the BJ joint region side on a surface that is in contact with the semiconductor layer. The voltage applying end is placed at a position apart from the BJ joint region in the first optical function device region.