Optical Cable Mounting on Electronic Chip Recess

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Solution Overview

Problem

Existing electronic devices face challenges in securely mounting optical cables to integrated circuit chips and configuring these chips on carrier substrates to support efficient optical signal coupling, leading to bulkiness and inefficiencies in electrical connections.

Innovation Solution

A carrier substrate with a recess and electrical connection network is used to securely mount an electronic chip, allowing an optical cable to be optically coupled to the chip's guide, while reducing the device's thickness through short electrical connections and accommodating the cable's passage, with optional through-passages or channels for additional chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the optical cable is mounted on the integrated circuit chip, then optical signal coupling is enabled, but the device becomes bulky and electrical connections become inefficient

Engineering Contradiction:
Improveoptical signal couplingVSAvoiddevice bulk
Core Design Contradiction:
ReliabilityVSVolume of stationary object

Solution Approach 1:

The patent transitions from planar mounting to three-dimensional vertical integration by routing the optical cable through a through-passage perpendicular to the carrier substrate. This dimensional change allows the optical cable to pass through the substrate thickness, enabling compact stacking and reducing the overall device footprint while maintaining reliable optical coupling between the cable and integrated circuit chip.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If traditional mounting methods are used, then optical cable can be secured, but electrical connections become long and inefficient

Engineering Contradiction:
Improveoptical cable mountingVSAvoidelectrical connection length
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The integrated circuit chip is nested within a recess formed in the carrier substrate, with the optical cable routed through a through-passage that passes through the substrate. This nested configuration allows electrical connection elements to be positioned directly beneath the chip pads, minimizing connection length. The through-passage enables the optical cable to pass through the substrate thickness, allowing secure mounting while maintaining short electrical paths from the chip to the carrier substrate surface.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables efficient optical signal coupling, reduces the device's bulk, and facilitates connection to printed circuit boards, enhancing the overall performance and compactness of the electronic device.

Implementation Method 1

an end section mounted flat on one side of the chip and including at least one guide of optical waves that is optically coupled to the guide of optical waves of the chip

Methodology Applied
Scientific EffectOptical coupling: Optical Fibre

Data Source

PatentUS10996412B2Electronic device comprising an electronic chip provided with an optical cable
Publication Date: 2021.05.04 STMICROELECTRONICS (GRENOBLE 2) SAS
  • US10996412B2 patent drawing
  • US10996412B2 patent drawing
  • US10996412B2 patent drawing

AI summary

A carrier substrate includes a first network of electrical connections and recess. An electronic chip is mounted to the carrier substrate within the recess. The electronic chip includes an integrated guide of optical waves and a second network of electrical connections. A end section of an elongate optical cable is mounted on one side of the electronic chip with a longitudinal guide of optical waves optically coupled to the integrated guide of optical waves. Electrical connection elements are interposed between a face of the electronic chip and a bottom wall of the recess, such that first connect pads of the first electrical connection network are connected to second connect pads of the second electrical connection network through the electrical connection elements.