Optical IC Chip Grating Coupler Placement for Simultaneous Testing
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Solution Overview
Problem
The existing methods for testing optical IC chips are inefficient due to the physical interference between DC probes and optical fiber arrays, which prevents simultaneous testing of optical and electrical systems, leading to prolonged testing times and reduced productivity.
Innovation Solution
The optical device is designed with grating couplers formed in a specified region away from the pads, allowing optical fibers to be arranged without interfering with DC probes, enabling simultaneous testing of optical and electrical systems by extending optical waveguides through a folding-back region, thus separating the grating coupler region from the device region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If grating couplers are formed near the optical devices on the wafer to enable wafer-level testing, then testing can be performed before dicing, but DC probes for electrical testing physically interfere with optical fiber arrays for optical testing, preventing simultaneous testing
Solution Approach 1:
The patent divides the wafer surface into distinct functional regions: a device region for forming optical devices and a grating coupler region for forming grating couplers. This spatial segmentation allows optical fiber arrays to be positioned in the grating coupler region while DC probes access pads in the device region, eliminating physical interference and enabling simultaneous optical and electrical testing.
Solution Approach 2:
The patent utilizes the spatial dimension by separating the grating coupler region from the device region along the wafer surface. This dimensional arrangement allows optical fibers and DC probes to operate in different spatial zones without interference, enabling parallel optical and electrical testing operations.
2Productivity
If optical fibers are arranged near grating couplers formed on the wafer surface for wafer-level testing, then testing productivity is improved, but physical interference with DC probes prevents simultaneous electrical system testing
Solution Approach 1:
The patent segments the wafer into a device region containing pads for DC probe access and a separate grating coupler region for optical fiber array positioning. This segmentation allows independent access paths for electrical and optical testing, enabling simultaneous operations without increasing overall system complexity.
3Ease of manufacture
If optical waveguides are extended to the edge of the optical IC chip for fiber alignment, then optical coupling is simplified, but the grating coupler region must be separated from the device region, reducing chip area utilization
Solution Approach 1:
The patent extends optical waveguides from the device region to the edge of the optical IC chip in the device region, while grating couplers are positioned in a separate grating coupler region. This dimensional arrangement simplifies optical fiber alignment at the chip edge while maintaining separate functional regions, effectively managing chip area utilization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for efficient testing of optical IC chips on a wafer before dicing, reducing testing time and increasing the number of chips that can be formed on a single wafer, while maintaining the ability to test both optical and electrical systems simultaneously.
Implementation Method 1
a grating coupler formed in a specified region, which is not close to the first side, on the optical IC chip
Data Source
AI summary
An optical device is formed on an optical IC chip. The shape of the optical IC chip is rectangular or parallelogram. The optical device induces: an optical device circuit; a first optical waveguide that is coupled to the optical device circuit; a pad that is electrically connected to the optical device circuit; a grating coupler; and a second optical waveguide that is coupled to the grating coupler. The pad is formed in a region close to a first side of the optical IC chip. The grating coupler is formed in a specified region, which is not close to the first side, on the optical IC chip. The first optical waveguide and the second optical waveguide are respectively extended to an edge of the optical IC chip.